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authorKorey Sewell <ksewell@umich.edu>2010-01-31 18:26:32 -0500
committerKorey Sewell <ksewell@umich.edu>2010-01-31 18:26:32 -0500
commite1fcc6498017574735362636791f9ad73fb39b04 (patch)
treeda58049ba1b2c6b52dced5aa8928cb6fc27485ab /src/cpu/inorder/cpu.hh
parent4a945aab1958d39fcfea4608715e77d5112809cf (diff)
downloadgem5-e1fcc6498017574735362636791f9ad73fb39b04.tar.xz
inorder: activate thread on cache miss
-Support ability to activate next ready thread after a cache miss through the activateNextReadyContext/Thread() functions -To support this a "readyList" of thread ids is added -After a cache miss, thread will suspend and then call activitynextreadythread
Diffstat (limited to 'src/cpu/inorder/cpu.hh')
-rw-r--r--src/cpu/inorder/cpu.hh23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 1c819638d..854f5167c 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -89,7 +89,7 @@ class InOrderCPU : public BaseCPU
typedef TimeBuffer<InterStageStruct> StageQueue;
friend class Resource;
-
+
public:
/** Constructs a CPU with the given parameters. */
InOrderCPU(Params *params);
@@ -175,6 +175,8 @@ class InOrderCPU : public BaseCPU
// pool event.
enum CPUEventType {
ActivateThread,
+ ActivateNextReadyThread,
+ DeactivateThread,
DeallocateThread,
SuspendThread,
DisableThreads,
@@ -361,6 +363,10 @@ class InOrderCPU : public BaseCPU
void activateContext(ThreadID tid, int delay = 0);
void activateThread(ThreadID tid);
+ /** Add Thread to Active Threads List. */
+ void activateNextReadyContext(int delay = 0);
+ void activateNextReadyThread();
+
/** Remove Thread from Active Threads List */
void suspendContext(ThreadID tid, int delay = 0);
void suspendThread(ThreadID tid);
@@ -612,6 +618,9 @@ class InOrderCPU : public BaseCPU
/** Current Threads List */
std::list<ThreadID> currentThreads;
+ /** Ready Threads List */
+ std::list<ThreadID> readyThreads;
+
/** Suspended Threads List */
std::list<ThreadID> suspendedThreads;
@@ -633,6 +642,18 @@ class InOrderCPU : public BaseCPU
/** Number of Active Threads in the CPU */
ThreadID numActiveThreads() { return activeThreads.size(); }
+ /** Thread id of active thread
+ * Only used for SwitchOnCacheMiss model. Assumes only 1 thread active
+ */
+ ThreadID activeThreadId()
+ {
+ if (numActiveThreads() > 0)
+ return activeThreads.front();
+ else
+ return -1;
+ }
+
+
/** Records that there was time buffer activity this cycle. */
void activityThisCycle() { activityRec.activity(); }