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| author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:40 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:40 -0400 |
| commit | f1c3691356355d2ca865e48e91814c56293f6326 (patch) | |
| tree | 6608284d5bcdab42d69042034d49198c647b1a2c /src/cpu/inorder/cpu.hh | |
| parent | 0bfdf342da40842a05351d53a384db4a8ff88bf5 (diff) | |
| download | gem5-f1c3691356355d2ca865e48e91814c56293f6326.tar.xz | |
inorder: check for interrupts each tick
use a dummy instruction to facilitate the squash after
the interrupts trap
Diffstat (limited to 'src/cpu/inorder/cpu.hh')
| -rw-r--r-- | src/cpu/inorder/cpu.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index f6b7a4e95..8a0f2167b 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -253,6 +253,7 @@ class InOrderCPU : public BaseCPU DynInstPtr dummyInst[ThePipeline::MaxThreads]; DynInstPtr dummyBufferInst; DynInstPtr dummyReqInst; + DynInstPtr dummyTrapInst[ThePipeline::MaxThreads]; /** Used by resources to signify a denied access to a resource. */ ResourceRequest *dummyReq[ThePipeline::MaxThreads]; @@ -414,6 +415,8 @@ class InOrderCPU : public BaseCPU bool simPalCheck(int palFunc, ThreadID tid); + void checkForInterrupts(); + /** Returns the Fault for any valid interrupt. */ Fault getInterrupts(); |