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author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 02:58:22 -0700 |
commit | 8ad2b8c5596b817267fbf7a39e6ce28ffb49789c (patch) | |
tree | e20e9aa7253fb12e2e6b8abf8932e726728004c1 /src/cpu/inorder/cpu.hh | |
parent | ef097eb69cec0753074d5190e5ff91aabfaef5e5 (diff) | |
download | gem5-8ad2b8c5596b817267fbf7a39e6ce28ffb49789c.tar.xz |
SE/FS: Make the functions available from the TC consistent between SE and FS.
Diffstat (limited to 'src/cpu/inorder/cpu.hh')
-rw-r--r-- | src/cpu/inorder/cpu.hh | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 098909cb7..dd53f3ce5 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -413,7 +413,6 @@ class InOrderCPU : public BaseCPU /** Get a Memory Port */ Port* getPort(const std::string &if_name, int idx = 0); -#if FULL_SYSTEM /** HW return from error interrupt. */ Fault hwrei(ThreadID tid); @@ -439,14 +438,13 @@ class InOrderCPU : public BaseCPU /** Check if this address is a valid data address. */ bool validDataAddr(Addr addr) { return true; } -#else + /** Schedule a syscall on the CPU */ void syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay = 0); /** Executes a syscall.*/ void syscall(int64_t callnum, ThreadID tid); -#endif /** Schedule a trap on the CPU */ void trapContext(Fault fault, ThreadID tid, DynInstPtr inst, int delay = 0); |