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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
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committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
commit | e1403fc2af61c224c573c47c77a36f9b1b78e7df (patch) | |
tree | 07647bb8697ac256d180bf8de35080eee2a63f3e /src/cpu/inorder/cpu.hh | |
parent | 2b0438a11eb6a9640b06da91e8a300d0ac3ad81a (diff) | |
download | gem5-e1403fc2af61c224c573c47c77a36f9b1b78e7df.tar.xz |
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an optional
delay parameter. However this parameter was often ignored. Also, when used,
the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were
ever specified). This patch removes the delay parameter and 'Events'
associated with them across all ISAs and cores. Unused activate logic
is also removed.
Diffstat (limited to 'src/cpu/inorder/cpu.hh')
-rw-r--r-- | src/cpu/inorder/cpu.hh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 7efd5ae21..b82aba779 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -498,7 +498,7 @@ class InOrderCPU : public BaseCPU void trap(const Fault &fault, ThreadID tid, DynInstPtr inst); /** Schedule thread activation on the CPU */ - void activateContext(ThreadID tid, Cycles delay = Cycles(0)); + void activateContext(ThreadID tid); /** Add Thread to Active Threads List. */ void activateThread(ThreadID tid); @@ -507,13 +507,13 @@ class InOrderCPU : public BaseCPU void activateThreadInPipeline(ThreadID tid); /** Schedule Thread Activation from Ready List */ - void activateNextReadyContext(Cycles delay = Cycles(0)); + void activateNextReadyContext(); /** Add Thread From Ready List to Active Threads List. */ void activateNextReadyThread(); /** Schedule a thread deactivation on the CPU */ - void deactivateContext(ThreadID tid, Cycles delay = Cycles(0)); + void deactivateContext(ThreadID tid); /** Remove from Active Thread List */ void deactivateThread(ThreadID tid); |