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| author | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:28:31 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:28:31 -0500 |
| commit | 4d749472e3cb97ff0421fbf5cbc53d9c89ecfa45 (patch) | |
| tree | 003805dffa52427f140e92b2d0e9163c1f12398c /src/cpu/inorder/first_stage.cc | |
| parent | b4e0ef78379dd5bab0ee6ec824bca3f51dd484c6 (diff) | |
| download | gem5-4d749472e3cb97ff0421fbf5cbc53d9c89ecfa45.tar.xz | |
inorder: enforce stage bandwidth
each stage keeps track of insts_processed on a per_thread basis but we should
be keeping that on a total basis inorder to enforce stage width limits
Diffstat (limited to 'src/cpu/inorder/first_stage.cc')
| -rw-r--r-- | src/cpu/inorder/first_stage.cc | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/cpu/inorder/first_stage.cc b/src/cpu/inorder/first_stage.cc index 75e13e559..27831469e 100644 --- a/src/cpu/inorder/first_stage.cc +++ b/src/cpu/inorder/first_stage.cc @@ -175,9 +175,14 @@ FirstStage::processInsts(ThreadID tid) ThePipeline::createFrontEndSchedule(inst); } - // Don't let instruction pass to next stage if it hasnt completed - // all of it's requests for this stage. - all_reqs_completed = processInstSchedule(inst); + int reqs_processed = 0; + all_reqs_completed = processInstSchedule(inst, reqs_processed); + + // If the instruction isnt squashed & we've completed one request + // Then we can officially count this instruction toward the stage's + // bandwidth count + if (reqs_processed > 0) + instsProcessed++; if (!all_reqs_completed) { if (new_inst) { |