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authorKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:35 -0400
committerKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:35 -0400
commitb195da9345c00c2961558f80715660c0c0a629fc (patch)
tree0e3c2dee853e7aa46db1a592b62a9d7934c00c69 /src/cpu/inorder/inorder_dyn_inst.cc
parentd5d4e47f76ec254b89c6b884f5fcbf340d4fed49 (diff)
downloadgem5-b195da9345c00c2961558f80715660c0c0a629fc.tar.xz
inorder: use setupSquash for misspeculation
implement a clean interface to handle branch misprediction and eventually all pipeline flushing
Diffstat (limited to 'src/cpu/inorder/inorder_dyn_inst.cc')
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 1bbd4f639..d8bfbacc7 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -316,6 +316,28 @@ InOrderDynInst::syscall(int64_t callnum)
#endif
void
+InOrderDynInst::setSquashInfo(unsigned stage_num)
+{
+ squashingStage = stage_num;
+ bdelaySeqNum = seqNum;
+
+#if ISA_HAS_DELAY_SLOT
+ if (isControl()) {
+ TheISA::PCState nextPC = pc;
+ TheISA::advancePC(nextPC, staticInst);
+
+ // Check to see if we should squash after the
+ // branch or after a branch delay slot.
+ if (pc.nextInstAddr() == pc.instAddr() + sizeof(MachInst))
+ bdelaySeqNum = seqNum + 1;
+ else
+ bdelaySeqNum = seqNum;
+
+ }
+#endif
+}
+
+void
InOrderDynInst::releaseReq(ResourceRequest* req)
{
std::list<ResourceRequest*>::iterator list_it = reqList.begin();