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author | Korey Sewell <ksewell@umich.edu> | 2010-04-10 23:31:36 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2010-04-10 23:31:36 -0400 |
commit | b49511ae4843fc7af3b28d7dfdb18d4e474b81d3 (patch) | |
tree | e7a8e0fe0d96f8cee1a6bb809a43003dcd2701ea /src/cpu/inorder/inorder_dyn_inst.cc | |
parent | d71f9712b3640239f70382baade7439ac783f9a1 (diff) | |
download | gem5-b49511ae4843fc7af3b28d7dfdb18d4e474b81d3.tar.xz |
inorder: timing for inst forwarding
when insts execute, they mark the time they finish to be used for subsequent isnts
they may need forwarding of data. However, the regdepmap was using the wrong
value to index into the destination operands of the instruction to be forwarded.
Thus, in some cases, we are checking to see if the 3rd destination register
for an instruction is executed at a certain time, when there is only 1 dest. register
valid. Thus, we get a bad, uninitialized time value that will stall forwarding
causing performance loss but still the correct execution.
Diffstat (limited to 'src/cpu/inorder/inorder_dyn_inst.cc')
-rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.cc | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc index 1b55c90e0..83004fdb8 100644 --- a/src/cpu/inorder/inorder_dyn_inst.cc +++ b/src/cpu/inorder/inorder_dyn_inst.cc @@ -534,6 +534,10 @@ InOrderDynInst::setIntRegOperand(const StaticInst *si, int idx, IntReg val) instResult[idx].type = Integer; instResult[idx].val.integer = val; instResult[idx].tick = curTick; + + DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Int Reg. %i " + "being set to %#x (result-tick:%i).\n", + threadNumber, seqNum, idx, val, instResult[idx].tick); } /** Sets a FP register. */ @@ -542,8 +546,11 @@ InOrderDynInst::setFloatRegOperand(const StaticInst *si, int idx, FloatReg val) { instResult[idx].val.dbl = val; instResult[idx].type = Float; - instResult[idx].tick = curTick; + + DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Float Reg. %i " + "being set to %#x (result-tick:%i).\n", + threadNumber, seqNum, idx, val, instResult[idx].tick); } /** Sets a FP register as a integer. */ @@ -554,6 +561,10 @@ InOrderDynInst::setFloatRegOperandBits(const StaticInst *si, int idx, instResult[idx].type = Integer; instResult[idx].val.integer = val; instResult[idx].tick = curTick; + + DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting Result Float Reg. %i " + "being set to %#x (result-tick:%i).\n", + threadNumber, seqNum, idx, val, instResult[idx].tick); } /** Sets a misc. register. */ @@ -655,7 +666,7 @@ InOrderDynInst::write(T data, Addr addr, unsigned flags, uint64_t *res) storeData = data; DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting store data to %#x.\n", - threadNumber, seqNum, memData); + threadNumber, seqNum, storeData); return cpu->write(this, data, addr, flags, res); } |