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authorKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:37 -0400
committerKorey Sewell <ksewell@umich.edu>2011-06-19 21:43:37 -0400
commit379c23199e957083dd1656c0686ee258facc6e19 (patch)
tree30d9af62b38d6a2a15e5e73f7f70030fec1ab9f6 /src/cpu/inorder/inorder_dyn_inst.cc
parent4c9ad53cc509e840d088db4a863c9cd932132635 (diff)
downloadgem5-379c23199e957083dd1656c0686ee258facc6e19.tar.xz
inorder: don't stall after stores
once a ST is sent off, it's OK to keep processing, however it's a little more complicated to handle the packet acknowledging the store is completed
Diffstat (limited to 'src/cpu/inorder/inorder_dyn_inst.cc')
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.cc25
1 files changed, 3 insertions, 22 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 7cf117ce4..1252ed6d1 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -176,21 +176,6 @@ InOrderDynInst::resetInstCount()
InOrderDynInst::~InOrderDynInst()
{
- if (fetchMemReq != 0x0) {
- delete fetchMemReq;
- fetchMemReq = NULL;
- }
-
- if (dataMemReq != 0x0) {
- delete dataMemReq;
- dataMemReq = NULL;
- }
-
- if (splitMemReq != 0x0) {
- delete dataMemReq;
- dataMemReq = NULL;
- }
-
if (traceData)
delete traceData;
@@ -557,6 +542,8 @@ InOrderDynInst::read(Addr addr, T &data, unsigned flags)
traceData->setData(data);
}
Fault fault = readBytes(addr, (uint8_t *)&data, sizeof(T), flags);
+ //@todo: the below lines should be unnecessary, timing access
+ // wont have valid data right here
DPRINTF(InOrderDynInst, "[sn:%i] (1) Received Bytes %x\n", seqNum, data);
data = TheISA::gtoh(data);
DPRINTF(InOrderDynInst, "[sn%:i] (2) Received Bytes %x\n", seqNum, data);
@@ -619,11 +606,7 @@ Fault
InOrderDynInst::writeBytes(uint8_t *data, unsigned size,
Addr addr, unsigned flags, uint64_t *res)
{
- assert(sizeof(storeData) >= size);
- memcpy(&storeData, data, size);
- DPRINTF(InOrderDynInst, "(2) [tid:%i]: [sn:%i] Setting store data to %#x.\n",
- threadNumber, seqNum, storeData);
- return cpu->write(this, (uint8_t *)&storeData, size, addr, flags, res);
+ return cpu->write(this, data, size, addr, flags, res);
}
template<class T>
@@ -635,8 +618,6 @@ InOrderDynInst::write(T data, Addr addr, unsigned flags, uint64_t *res)
traceData->setData(data);
}
data = TheISA::htog(data);
- DPRINTF(InOrderDynInst, "(1) [tid:%i]: [sn:%i] Setting store data to %#x.\n",
- threadNumber, seqNum, data);
return writeBytes((uint8_t*)&data, sizeof(T), addr, flags, res);
}