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author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:35 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:35 -0400 |
commit | 73cfab8b234c595e86413d4f7169bddc1a1184dd (patch) | |
tree | 065463faacd0279cbffc033948224cd336c53b16 /src/cpu/inorder/inorder_dyn_inst.cc | |
parent | 4f34bc8b7ba3ef73fa0511560869c7a22c1b187c (diff) | |
download | gem5-73cfab8b234c595e86413d4f7169bddc1a1184dd.tar.xz |
inorder: DynInst handling of stores for big-endian ISAs
The DynInst was not performing the host-to-guest translation
which ended up breaking stores for SPARC
Diffstat (limited to 'src/cpu/inorder/inorder_dyn_inst.cc')
-rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.cc | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc index dea1a7dfe..1bbd4f639 100644 --- a/src/cpu/inorder/inorder_dyn_inst.cc +++ b/src/cpu/inorder/inorder_dyn_inst.cc @@ -527,7 +527,10 @@ InOrderDynInst::read(Addr addr, T &data, unsigned flags) traceData->setData(data); } Fault fault = readBytes(addr, (uint8_t *)&data, sizeof(T), flags); + DPRINTF(InOrderDynInst, "[sn:%i] (1) Received Bytes %x\n", seqNum, data); data = TheISA::gtoh(data); + DPRINTF(InOrderDynInst, "[sn%:i] (2) Received Bytes %x\n", seqNum, data); + if (traceData) traceData->setData(data); return fault; @@ -588,6 +591,8 @@ InOrderDynInst::writeBytes(uint8_t *data, unsigned size, { assert(sizeof(storeData) >= size); memcpy(&storeData, data, size); + DPRINTF(InOrderDynInst, "(2) [tid:%i]: [sn:%i] Setting store data to %#x.\n", + threadNumber, seqNum, storeData); return cpu->write(this, (uint8_t *)&storeData, size, addr, flags, res); } @@ -595,15 +600,13 @@ template<class T> inline Fault InOrderDynInst::write(T data, Addr addr, unsigned flags, uint64_t *res) { - storeData = data; - - DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Setting store data to %#x.\n", - threadNumber, seqNum, storeData); if (traceData) { traceData->setAddr(addr); traceData->setData(data); } - storeData = TheISA::htog(data); + data = TheISA::htog(data); + DPRINTF(InOrderDynInst, "(1) [tid:%i]: [sn:%i] Setting store data to %#x.\n", + threadNumber, seqNum, data); return writeBytes((uint8_t*)&data, sizeof(T), addr, flags, res); } |