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author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
commit | b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353 (patch) | |
tree | 14b4f11266600c44ec4c1846665277115911b363 /src/cpu/inorder/pipeline_stage.cc | |
parent | 1c8dfd92543aba5f49e464b17e7e8143fc01a58c (diff) | |
download | gem5-b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353.tar.xz |
inorder-bpred: edits to handle non-delay-slot ISAs
Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline
Diffstat (limited to 'src/cpu/inorder/pipeline_stage.cc')
-rw-r--r-- | src/cpu/inorder/pipeline_stage.cc | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/cpu/inorder/pipeline_stage.cc b/src/cpu/inorder/pipeline_stage.cc index cb69464b0..d8e26f725 100644 --- a/src/cpu/inorder/pipeline_stage.cc +++ b/src/cpu/inorder/pipeline_stage.cc @@ -342,13 +342,21 @@ PipelineStage::squashDueToBranch(DynInstPtr &inst, unsigned tid) toPrevStages->stageInfo[stageNum][tid].doneSeqNum = inst->seqNum; toPrevStages->stageInfo[stageNum][tid].squash = true; toPrevStages->stageInfo[stageNum][tid].nextPC = inst->readPredTarg(); + + +#if ISA_HAS_DELAY_SLOT toPrevStages->stageInfo[stageNum][tid].branchTaken = inst->readNextNPC() != (inst->readNextPC() + sizeof(TheISA::MachInst)); toPrevStages->stageInfo[stageNum][tid].bdelayDoneSeqNum = inst->bdelaySeqNum; - - DPRINTF(InOrderStage, "Target being re-set to %08p\n", inst->readPredTarg()); InstSeqNum squash_seq_num = inst->bdelaySeqNum; +#else + toPrevStages->stageInfo[stageNum][tid].branchTaken = inst->readNextPC() != + (inst->readPC() + sizeof(TheISA::MachInst)); + toPrevStages->stageInfo[stageNum][tid].bdelayDoneSeqNum = inst->seqNum; + InstSeqNum squash_seq_num = inst->seqNum; +#endif + DPRINTF(InOrderStage, "Target being re-set to %08p\n", inst->readPredTarg()); DPRINTF(InOrderStage, "[tid:%i]: Squashing after [sn:%i], due to [sn:%i] " "branch.\n", tid, squash_seq_num, inst->seqNum); |