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| author | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:13 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:13 -0500 |
| commit | eac5eac67ae8076e934d78063a24eeef08f25413 (patch) | |
| tree | a782cc748f191af1b5ddf3027913067599019d02 /src/cpu/inorder/pipeline_stage.hh | |
| parent | d8e0935af2805bc2c4bdfbab7de2c63f7fde46f7 (diff) | |
| download | gem5-eac5eac67ae8076e934d78063a24eeef08f25413.tar.xz | |
inorder: squash on memory stall
add code to recognize memory stalls in resources and the pipeline as well
as squash a thread if there is a stall and we are in the switch on cache miss
model
Diffstat (limited to 'src/cpu/inorder/pipeline_stage.hh')
| -rw-r--r-- | src/cpu/inorder/pipeline_stage.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/inorder/pipeline_stage.hh b/src/cpu/inorder/pipeline_stage.hh index 42a632560..f10906e4c 100644 --- a/src/cpu/inorder/pipeline_stage.hh +++ b/src/cpu/inorder/pipeline_stage.hh @@ -240,7 +240,7 @@ class PipelineStage */ virtual void squashDueToBranch(DynInstPtr &inst, ThreadID tid); - virtual void squashDueToMemStall(DynInstPtr &inst, ThreadID tid); + virtual void squashDueToMemStall(InstSeqNum seq_num, ThreadID tid); /** Squash instructions from stage buffer */ virtual void squashPrevStageInsts(InstSeqNum squash_seq_num, ThreadID tid); |