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author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:36 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:36 -0400 |
commit | 7dea79535c87b68b5fc6143190d09b8fc364f2aa (patch) | |
tree | 3f30f0716de709f86b9adaa746f0b3e312203cef /src/cpu/inorder/pipeline_stage.hh | |
parent | 061b369d288ba4e3fdb145c025fb4d80378cb851 (diff) | |
download | gem5-7dea79535c87b68b5fc6143190d09b8fc364f2aa.tar.xz |
inorder: implement trap handling
Diffstat (limited to 'src/cpu/inorder/pipeline_stage.hh')
-rw-r--r-- | src/cpu/inorder/pipeline_stage.hh | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/src/cpu/inorder/pipeline_stage.hh b/src/cpu/inorder/pipeline_stage.hh index d0d9112c0..963d96afb 100644 --- a/src/cpu/inorder/pipeline_stage.hh +++ b/src/cpu/inorder/pipeline_stage.hh @@ -227,21 +227,17 @@ class PipelineStage public: void activateThread(ThreadID tid); - /** Squashes if there is a PC-relative branch that was predicted - * incorrectly. Sends squash information back to fetch. - */ - void squashDueToBranch(DynInstPtr &inst, ThreadID tid); + /** Setup Squashing Information to be passed back thru the pipeline */ + void setupSquash(DynInstPtr inst, ThreadID tid); virtual void squashDueToMemStall(InstSeqNum seq_num, ThreadID tid); + /** Perform squash of instructions above seq_num */ + virtual void squash(InstSeqNum squash_num, ThreadID tid); + /** Squash instructions from stage buffer */ void squashPrevStageInsts(InstSeqNum squash_seq_num, ThreadID tid); - /** Squashes due to commit signalling a squash. Changes status to - * squashing and clears block/unblock signals as needed. - */ - virtual void squash(InstSeqNum squash_num, ThreadID tid); - void dumpInsts(); protected: |