diff options
author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:33 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:33 -0400 |
commit | 6df63650956387d88f24122c783438553412768f (patch) | |
tree | 4aa1a3de620075e5a9994b6d1ae09da08d554ebc /src/cpu/inorder/reg_dep_map.hh | |
parent | 19e3eb29154ad17664bfe239423f6ba64c77cf05 (diff) | |
download | gem5-6df63650956387d88f24122c783438553412768f.tar.xz |
inorder: add types for dependency checks
Diffstat (limited to 'src/cpu/inorder/reg_dep_map.hh')
-rw-r--r-- | src/cpu/inorder/reg_dep_map.hh | 48 |
1 files changed, 26 insertions, 22 deletions
diff --git a/src/cpu/inorder/reg_dep_map.hh b/src/cpu/inorder/reg_dep_map.hh index 77d0cf0ca..2aff5687b 100644 --- a/src/cpu/inorder/reg_dep_map.hh +++ b/src/cpu/inorder/reg_dep_map.hh @@ -34,22 +34,24 @@ #include <list> #include <vector> +#include <string> #include "arch/isa_traits.hh" #include "config/the_isa.hh" #include "cpu/inorder/pipeline_traits.hh" -class InOrderCPU; - class RegDepMap { + public: typedef ThePipeline::DynInstPtr DynInstPtr; + typedef TheISA::RegIndex RegIndex; + typedef uint8_t RegType; - public: RegDepMap(int size = TheISA::TotalNumRegs); - ~RegDepMap(); + static std::string mapNames[]; + std::string name(); void setCPU(InOrderCPU *_cpu); @@ -60,47 +62,49 @@ class RegDepMap /** Insert all of a instruction's destination registers into map*/ void insert(DynInstPtr inst); - /** Insert an instruction into a specific destination register index - * onto map - */ - void insert(unsigned idx, DynInstPtr inst); - /** Remove all of a instruction's destination registers into map*/ void remove(DynInstPtr inst); - /** Remove a specific instruction and dest. register index from map*/ - void remove(unsigned idx, DynInstPtr inst); - /** Remove Front instruction from a destination register */ - void removeFront(unsigned idx, DynInstPtr inst); + void removeFront(uint8_t reg_type, RegIndex idx, DynInstPtr inst); /** Is the current instruction able to read from this * destination register? */ - bool canRead(unsigned idx, DynInstPtr inst); + bool canRead(uint8_t reg_type, RegIndex idx, DynInstPtr inst); /** Is the current instruction able to get a forwarded value from * another instruction for this destination register? */ - DynInstPtr canForward(unsigned reg_idx, DynInstPtr inst, unsigned clean_idx); + DynInstPtr canForward(uint8_t reg_type, unsigned reg_idx, + DynInstPtr inst, unsigned clean_idx); /** find an instruction to forward/bypass a value from */ - DynInstPtr findBypassInst(unsigned idx); + DynInstPtr findBypassInst(RegIndex idx); /** Is the current instruction able to write to this * destination register? */ - bool canWrite(unsigned idx, DynInstPtr inst); + bool canWrite(uint8_t reg_type, RegIndex idx, DynInstPtr inst); /** Size of Dependency of Map */ - int depSize(unsigned idx); + int depSize(RegIndex idx); void dump(); - protected: - // Eventually make this a map of lists for - // efficiency sake! - std::vector<std::list<DynInstPtr> > regMap; + private: + /** Insert an instruction into a specific destination register index + * onto map. This must be called w/the unflattened registered index + */ + void insert(RegIndex idx, DynInstPtr inst); + + /** Remove a specific instruction and dest. register index from map + * This must be called w/the unflattened registered index + */ + void remove(RegIndex idx, DynInstPtr inst); + + typedef std::vector<std::list<DynInstPtr> > DepMap; + std::vector<DepMap> regMap; InOrderCPU *cpu; }; |