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author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:36 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:36 -0400 |
commit | f0f33ae2b9be89c062c1df3c61291aa60151713e (patch) | |
tree | b3d0fd68723e64d720aba8a8240ecc664b0f57e3 /src/cpu/inorder/resources/cache_unit.cc | |
parent | 555bd4d8423bcc4edd77acd3226bcd2af0cbcdac (diff) | |
download | gem5-f0f33ae2b9be89c062c1df3c61291aa60151713e.tar.xz |
inorder: add flatDestReg member to dyninst
use it in reg. dep. tracking
Diffstat (limited to 'src/cpu/inorder/resources/cache_unit.cc')
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 760fdb134..1050713a1 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -1075,7 +1075,7 @@ CacheUnitEvent::process() //@todo: eventually, we should do a timing translation w/ // hw page table walk on tlb miss - DPRINTF(Fault, "Handling Fault %s\n", inst->fault->name()); + DPRINTF(Fault, "Handling Fault %s : [sn:%i] %x\n", inst->fault->name(), inst->seqNum, inst->getMemAddr()); inst->fault->invoke(tlb_res->cpu->tcBase(tid), inst->staticInst); tlb_res->tlbBlocked[tid] = false; |