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author | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:27:12 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:27:12 -0500 |
commit | 611a8642c2d50989da15e1ddd9dc87c036e8ab99 (patch) | |
tree | 050c513a25bd9f73f8ae2505767bee5578a5de35 /src/cpu/inorder/resources/cache_unit.cc | |
parent | 4dbc2f17180d3d8c82d5414daa55b102de9755e5 (diff) | |
download | gem5-611a8642c2d50989da15e1ddd9dc87c036e8ab99.tar.xz |
inorder: mem. mgmt. update
update address List and address Map to take
into account multiple threads
Diffstat (limited to 'src/cpu/inorder/resources/cache_unit.cc')
-rw-r--r-- | src/cpu/inorder/resources/cache_unit.cc | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc index 8f92db3e4..3de5c518a 100644 --- a/src/cpu/inorder/resources/cache_unit.cc +++ b/src/cpu/inorder/resources/cache_unit.cc @@ -131,6 +131,8 @@ CacheUnit::init() int CacheUnit::getSlot(DynInstPtr inst) { + ThreadID tid = inst->readTid(); + if (tlbBlocked[inst->threadNumber]) { return -1; } @@ -142,7 +144,7 @@ CacheUnit::getSlot(DynInstPtr inst) Addr req_addr = inst->getMemAddr(); if (resName == "icache_port" || - find(addrList.begin(), addrList.end(), req_addr) == addrList.end()) { + find(addrList[tid].begin(), addrList[tid].end(), req_addr) == addrList[tid].end()) { int new_slot = Resource::getSlot(inst); @@ -150,8 +152,8 @@ CacheUnit::getSlot(DynInstPtr inst) return -1; inst->memTime = curTick; - addrList.push_back(req_addr); - addrMap[req_addr] = inst->seqNum; + addrList[tid].push_back(req_addr); + addrMap[tid][req_addr] = inst->seqNum; DPRINTF(InOrderCachePort, "[tid:%i]: [sn:%i]: Address %08p added to dependency list\n", inst->readTid(), inst->seqNum, req_addr); @@ -160,7 +162,7 @@ CacheUnit::getSlot(DynInstPtr inst) DPRINTF(InOrderCachePort, "[tid:%i] Denying request because there is an outstanding" " request to/for addr. %08p. by [sn:%i] @ tick %i\n", - inst->readTid(), req_addr, addrMap[req_addr], inst->memTime); + inst->readTid(), req_addr, addrMap[tid][req_addr], inst->memTime); return -1; } } @@ -168,15 +170,17 @@ CacheUnit::getSlot(DynInstPtr inst) void CacheUnit::freeSlot(int slot_num) { - vector<Addr>::iterator vect_it = find(addrList.begin(), addrList.end(), + ThreadID tid = reqMap[slot_num]->inst->readTid(); + + vector<Addr>::iterator vect_it = find(addrList[tid].begin(), addrList[tid].end(), reqMap[slot_num]->inst->getMemAddr()); - assert(vect_it != addrList.end()); + assert(vect_it != addrList[tid].end()); DPRINTF(InOrderCachePort, "[tid:%i]: Address %08p removed from dependency list\n", reqMap[slot_num]->inst->readTid(), (*vect_it)); - addrList.erase(vect_it); + addrList[tid].erase(vect_it); Resource::freeSlot(slot_num); } |