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| author | Korey Sewell <ksewell@umich.edu> | 2011-02-04 00:09:19 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-02-04 00:09:19 -0500 |
| commit | e57613588b15f25b5b912ae98134b6f1007988fd (patch) | |
| tree | 28a0e580bd850a2e35162a8c0d8dafa9bee2eedc /src/cpu/inorder/resources/fetch_seq_unit.cc | |
| parent | 68d962f8aff7d2fcc2f8ee77878dd5cab73b69f2 (diff) | |
| download | gem5-e57613588b15f25b5b912ae98134b6f1007988fd.tar.xz | |
inorder: pcstate and delay slots bug
not taken delay slots were not being advanced correctly to pc+8, so for those ISAs
we 'advance()' the pcstate one more time for the desired effect
Diffstat (limited to 'src/cpu/inorder/resources/fetch_seq_unit.cc')
| -rw-r--r-- | src/cpu/inorder/resources/fetch_seq_unit.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc index 7fd57cc75..6ed949df3 100644 --- a/src/cpu/inorder/resources/fetch_seq_unit.cc +++ b/src/cpu/inorder/resources/fetch_seq_unit.cc @@ -68,8 +68,6 @@ FetchSeqUnit::init() void FetchSeqUnit::execute(int slot_num) { - // After this is working, change this to a reinterpret cast - // for performance considerations ResourceRequest* fs_req = reqMap[slot_num]; DynInstPtr inst = fs_req->inst; ThreadID tid = inst->readTid(); @@ -78,6 +76,9 @@ FetchSeqUnit::execute(int slot_num) fs_req->fault = NoFault; + DPRINTF(InOrderFetchSeq, "[tid:%i]: Current PC is %s\n", tid, + pc[tid]); + switch (fs_req->cmd) { case AssignNextPC: @@ -86,14 +87,13 @@ FetchSeqUnit::execute(int slot_num) inst->pcState(pc[tid]); inst->setMemAddr(pc[tid].instAddr()); - pc[tid].advance(); //XXX HACK! - inst->setPredTarg(pc[tid]); + // Advance to next PC (typically PC + 4) + pc[tid].advance(); inst->setSeqNum(cpu->getAndIncrementInstSeq(tid)); DPRINTF(InOrderFetchSeq, "[tid:%i]: Assigning [sn:%i] to " - "PC %s\n", tid, inst->seqNum, - inst->pcState()); + "PC %s\n", tid, inst->seqNum, inst->pcState()); fs_req->done(); } else { |