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authorAndreas Hansson <andreas.hansson@arm.com>2012-02-13 06:45:11 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-02-13 06:45:11 -0500
commit63777fb23f043012ba052fc9c5968da7bdd59221 (patch)
treefb4e31c4acfa6218a08f0fa627db390f6f22b1be /src/cpu/inorder/resources/fetch_seq_unit.hh
parent5a9a743cfc4517f93e5c94533efa767b92272c59 (diff)
downloadgem5-63777fb23f043012ba052fc9c5968da7bdd59221.tar.xz
MEM: Pass the ports from Python to C++ using the Swig params
This patch adds basic information about the ports in the parameter classes to be passed from the Python world to the corresponding C++ object. Currently, the only information passed is the number of connected peers, which for a Port is either 0 or 1, and for a VectorPort reflects the size of the VectorPort. The default port of the bus had to be renamed to avoid using the name "default" as a field in the parameter class. It is possible to extend the Swig'ed information further and add e.g. a pair with a description and size.
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