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author | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-05-26 13:44:46 -0700 |
commit | 0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch) | |
tree | 1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/cpu/inorder/resources/fetch_unit.cc | |
parent | eae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff) | |
download | gem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz |
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs
more flexibility in how they cache things and manage the process.
--HG--
rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/cpu/inorder/resources/fetch_unit.cc')
-rw-r--r-- | src/cpu/inorder/resources/fetch_unit.cc | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc index cc4b8b53e..07669ef2a 100644 --- a/src/cpu/inorder/resources/fetch_unit.cc +++ b/src/cpu/inorder/resources/fetch_unit.cc @@ -34,7 +34,6 @@ #include "arch/isa_traits.hh" #include "arch/locked_mem.hh" -#include "arch/predecoder.hh" #include "arch/utility.hh" #include "config/the_isa.hh" #include "cpu/inorder/resources/cache_unit.hh" @@ -60,7 +59,7 @@ FetchUnit::FetchUnit(string res_name, int res_id, int res_width, instSize(sizeof(TheISA::MachInst)), fetchBuffSize(params->fetchBuffSize) { for (int tid = 0; tid < MaxThreads; tid++) - predecoder[tid] = new Predecoder(NULL); + decoder[tid] = new Decoder(NULL); } FetchUnit::~FetchUnit() @@ -92,7 +91,6 @@ void FetchUnit::createMachInst(std::list<FetchBlock*>::iterator fetch_it, DynInstPtr inst) { - ExtMachInst ext_inst; Addr block_addr = cacheBlockAlign(inst->getMemAddr()); Addr fetch_addr = inst->getMemAddr(); unsigned fetch_offset = (fetch_addr - block_addr) / instSize; @@ -111,13 +109,11 @@ FetchUnit::createMachInst(std::list<FetchBlock*>::iterator fetch_it, MachInst mach_inst = TheISA::gtoh(fetchInsts[fetch_offset]); - predecoder[tid]->setTC(cpu->thread[tid]->getTC()); - predecoder[tid]->moreBytes(instPC, inst->instAddr(), mach_inst); - assert(predecoder[tid]->extMachInstReady()); - ext_inst = predecoder[tid]->getExtMachInst(instPC); - + decoder[tid]->setTC(cpu->thread[tid]->getTC()); + decoder[tid]->moreBytes(instPC, inst->instAddr(), mach_inst); + assert(decoder[tid]->instReady()); + inst->setStaticInst(decoder[tid]->decode(instPC)); inst->pcState(instPC); - inst->setStaticInst(decoder.decode(ext_inst, instPC.instAddr())); } void @@ -582,7 +578,7 @@ void FetchUnit::trap(Fault fault, ThreadID tid, DynInstPtr inst) { //@todo: per thread? - predecoder[tid]->reset(); + decoder[tid]->reset(); //@todo: squash using dummy inst seq num squash(NULL, NumStages - 1, 0, tid); |