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author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:13 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:13 -0400 |
commit | 1c8dfd92543aba5f49e464b17e7e8143fc01a58c (patch) | |
tree | 3c5b9059b07e8d0bccdf826249330bfcb8c5c1cc /src/cpu/inorder/resources/mult_div_unit.cc | |
parent | 63db33c4b1cd7a071c2a2fe47bda21a73618d054 (diff) | |
download | gem5-1c8dfd92543aba5f49e464b17e7e8143fc01a58c.tar.xz |
inorder-alpha-port: initial inorder support of ALPHA
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
Diffstat (limited to 'src/cpu/inorder/resources/mult_div_unit.cc')
-rw-r--r-- | src/cpu/inorder/resources/mult_div_unit.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/inorder/resources/mult_div_unit.cc b/src/cpu/inorder/resources/mult_div_unit.cc index b31d60ad5..df9d4c293 100644 --- a/src/cpu/inorder/resources/mult_div_unit.cc +++ b/src/cpu/inorder/resources/mult_div_unit.cc @@ -47,7 +47,7 @@ MultDivUnit::MultDivUnit(string res_name, int res_id, int res_width, div16RepeatRate(params->div16RepeatRate), div16Latency(params->div16Latency), div24RepeatRate(params->div24RepeatRate), div24Latency(params->div24Latency), div32RepeatRate(params->div32RepeatRate), div32Latency(params->div32Latency), - lastMDUCycle(0) + lastMDUCycle(0), lastOpType(No_OpClass) { } void |