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| author | Korey Sewell <ksewell@umich.edu> | 2011-02-12 10:14:45 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-02-12 10:14:45 -0500 |
| commit | e26aee514d328bd8c9930c742df6ce1485dce5ae (patch) | |
| tree | d64c361532c00a47d30ddcb58b3205406b1adfe4 /src/cpu/inorder/resources/tlb_unit.cc | |
| parent | 516b61146271b13d2350563b0349747724ffbc99 (diff) | |
| download | gem5-e26aee514d328bd8c9930c742df6ce1485dce5ae.tar.xz | |
inorder: utilize cached skeds in pipeline
allow the pipeline and resources to use the cached instruction schedule and resource
sked iterator
Diffstat (limited to 'src/cpu/inorder/resources/tlb_unit.cc')
| -rw-r--r-- | src/cpu/inorder/resources/tlb_unit.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/inorder/resources/tlb_unit.cc b/src/cpu/inorder/resources/tlb_unit.cc index 59840d15b..2e19ea928 100644 --- a/src/cpu/inorder/resources/tlb_unit.cc +++ b/src/cpu/inorder/resources/tlb_unit.cc @@ -217,7 +217,7 @@ TLBUnitEvent::process() // Effectively NOP the instruction but still allow it // to commit //while (!inst->resSched.empty() && - // inst->resSched.top()->stageNum != ThePipeline::NumStages - 1) { + // inst->curSkedEntry->stageNum != ThePipeline::NumStages - 1) { //inst->resSched.pop(); //} } |