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| author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:15 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:15 -0400 |
| commit | c9a03f549b63dbf2e6e192bce02c57c48cec05e2 (patch) | |
| tree | c1328d0f17e4346e04a3ca98958b67f422791388 /src/cpu/inorder/resources/tlb_unit.hh | |
| parent | 1c7e988272efead94d2cfbe3fd65ba454d3e1fc1 (diff) | |
| download | gem5-c9a03f549b63dbf2e6e192bce02c57c48cec05e2.tar.xz | |
inorder-mem: clean up allocation/deletion of requests/packets
* * *
Diffstat (limited to 'src/cpu/inorder/resources/tlb_unit.hh')
| -rw-r--r-- | src/cpu/inorder/resources/tlb_unit.hh | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/cpu/inorder/resources/tlb_unit.hh b/src/cpu/inorder/resources/tlb_unit.hh index 67e1bda1d..4ca240ba8 100644 --- a/src/cpu/inorder/resources/tlb_unit.hh +++ b/src/cpu/inorder/resources/tlb_unit.hh @@ -106,21 +106,22 @@ class TLBUnitRequest : public ResourceRequest { aligned_addr = inst->getMemAddr(); req_size = sizeof(TheISA::MachInst); flags = 0; + inst->fetchMemReq = new Request(inst->readTid(), aligned_addr, req_size, + flags, inst->readPC(), res->cpu->readCpuId(), inst->readTid()); + memReq = inst->fetchMemReq; } else { aligned_addr = inst->getMemAddr();; req_size = inst->getMemAccSize(); flags = inst->getMemFlags(); - } - if (req_size == 0 && (inst->isDataPrefetch() || inst->isInstPrefetch())) { - req_size = 8; - } + if (req_size == 0 && (inst->isDataPrefetch() || inst->isInstPrefetch())) { + req_size = 8; + } - // @TODO: Add Vaddr & Paddr functions - inst->memReq = new Request(inst->readTid(), aligned_addr, req_size, + inst->dataMemReq = new Request(inst->readTid(), aligned_addr, req_size, flags, inst->readPC(), res->cpu->readCpuId(), inst->readTid()); - - memReq = inst->memReq; + memReq = inst->dataMemReq; + } } RequestPtr memReq; |