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| author | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:41 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2011-06-19 21:43:41 -0400 |
| commit | 716e447da8424386f2c3448c17891927aeb49f67 (patch) | |
| tree | 7cd5ba23161faa0a5337b5a7add3f75569bbfd76 /src/cpu/inorder/resources/use_def.hh | |
| parent | 83a0fd24f72ed46e71c015c23b723c04d39ca93c (diff) | |
| download | gem5-716e447da8424386f2c3448c17891927aeb49f67.tar.xz | |
inorder: handle serializing instructions
including IPR accesses and store-conditionals. These class of instructions will not
execute correctly in a superscalar machine
Diffstat (limited to 'src/cpu/inorder/resources/use_def.hh')
| -rw-r--r-- | src/cpu/inorder/resources/use_def.hh | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/inorder/resources/use_def.hh b/src/cpu/inorder/resources/use_def.hh index 7e2a77469..9581bc5f5 100644 --- a/src/cpu/inorder/resources/use_def.hh +++ b/src/cpu/inorder/resources/use_def.hh @@ -76,9 +76,11 @@ class UseDefUnit : public Resource { RegDepMap *regDepMap[ThePipeline::MaxThreads]; bool *nonSpecInstActive[ThePipeline::MaxThreads]; - InstSeqNum *nonSpecSeqNum[ThePipeline::MaxThreads]; + bool serializeOnNextInst[ThePipeline::MaxThreads]; + InstSeqNum serializeAfterSeqNum[ThePipeline::MaxThreads]; + Stats::Average uniqueRegsPerSwitch; std::map<RegIndex, bool> uniqueIntRegMap; std::map<RegIndex, bool> uniqueFloatRegMap; |