Clock: Add a Cycles wrapper class and use where applicable

This patch addresses the comments and feedback on the preceding patch
that reworks the clocks and now more clearly shows where cycles
(relative cycle counts) are used to express time.

Instead of bumping the existing patch I chose to make this a separate
patch, merely to try and focus the discussion around a smaller set of
changes. The two patches will be pushed together though.

This changes done as part of this patch are mostly following directly
from the introduction of the wrapper class, and change enough code to
make things compile and run again. There are definitely more places
where int/uint/Tick is still used to represent cycles, and it will
take some time to chase them all down. Similarly, a lot of parameters
should be changed from Param.Tick and Param.Unsigned to
Param.Cycles.

In addition, the use of curTick is questionable as there should not be
an absolute cycle. Potential solutions can be built on top of this
patch. There is a similar situation in the o3 CPU where
lastRunningCycle is currently counting in Cycles, and is still an
absolute time. More discussion to be had in other words.

An additional change that would be appropriate in the future is to
perform a similar wrapping of Tick and probably also introduce a
Ticks class along with suitable operators for all these classes.

25 files changed, 45 insertions, 32 deletions

diff --git a/src/cpu/inorder/resources/agen_unit.cc b/src/cpu/inorder/resources/agen_unit.cc
index 7be8a23f2..f978b2fa7 100644
--- a/src/cpu/inorder/resources/agen_unit.cc
+++ b/src/cpu/inorder/resources/agen_unit.cc
@@ -33,7 +33,7 @@
 #include "debug/InOrderAGEN.hh"
 
 AGENUnit::AGENUnit(std::string res_name, int res_id, int res_width,
-                   int res_latency, InOrderCPU *_cpu,
+                   Cycles res_latency, InOrderCPU *_cpu,
                    ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 { }
diff --git a/src/cpu/inorder/resources/agen_unit.hh b/src/cpu/inorder/resources/agen_unit.hh
index f208ec680..5c67b4c2f 100644
--- a/src/cpu/inorder/resources/agen_unit.hh
+++ b/src/cpu/inorder/resources/agen_unit.hh
@@ -48,7 +48,8 @@ class AGENUnit : public Resource {
 
   public:
     AGENUnit(std::string res_name, int res_id, int res_width,
-             int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+             Cycles res_latency, InOrderCPU *_cpu,
+             ThePipeline::Params *params);
 
     enum Command {
         GenerateAddr
diff --git a/src/cpu/inorder/resources/branch_predictor.cc b/src/cpu/inorder/resources/branch_predictor.cc
index 65b95ff31..004cf8b63 100644
--- a/src/cpu/inorder/resources/branch_predictor.cc
+++ b/src/cpu/inorder/resources/branch_predictor.cc
@@ -39,8 +39,9 @@ using namespace std;
 using namespace TheISA;
 using namespace ThePipeline;
 
-BranchPredictor::BranchPredictor(std::string res_name, int res_id, int res_width,
-                                 int res_latency, InOrderCPU *_cpu,
+BranchPredictor::BranchPredictor(std::string res_name, int res_id,
+                                 int res_width, Cycles res_latency,
+                                 InOrderCPU *_cpu,
                                  ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       branchPred(this, params)
diff --git a/src/cpu/inorder/resources/branch_predictor.hh b/src/cpu/inorder/resources/branch_predictor.hh
index 72b216806..dde340ce7 100644
--- a/src/cpu/inorder/resources/branch_predictor.hh
+++ b/src/cpu/inorder/resources/branch_predictor.hh
@@ -54,7 +54,8 @@ class BranchPredictor : public Resource {
 
   public:
     BranchPredictor(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+                    Cycles res_latency, InOrderCPU *_cpu,
+                    ThePipeline::Params *params);
 
     void regStats();
 
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index 21d7bb6e2..e380c79d4 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -67,7 +67,8 @@ printMemData(uint8_t *data, unsigned size)
 #endif
 
 CacheUnit::CacheUnit(string res_name, int res_id, int res_width,
-        int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params)
+                     Cycles res_latency, InOrderCPU *_cpu,
+                     ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       cachePort(NULL), cachePortBlocked(false)
 {
diff --git a/src/cpu/inorder/resources/cache_unit.hh b/src/cpu/inorder/resources/cache_unit.hh
index dda39a7a5..9a7faf9cd 100644
--- a/src/cpu/inorder/resources/cache_unit.hh
+++ b/src/cpu/inorder/resources/cache_unit.hh
@@ -58,7 +58,8 @@ class CacheUnit : public Resource
 
   public:
     CacheUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+              Cycles res_latency, InOrderCPU *_cpu,
+              ThePipeline::Params *params);
 
     enum Command {
         InitiateReadData,
diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc
index d0cf7ffb2..7b7eccd0a 100644
--- a/src/cpu/inorder/resources/decode_unit.cc
+++ b/src/cpu/inorder/resources/decode_unit.cc
@@ -40,7 +40,7 @@ using namespace ThePipeline;
 using namespace std;
 
 DecodeUnit::DecodeUnit(std::string res_name, int res_id, int res_width,
-                       int res_latency, InOrderCPU *_cpu,
+                       Cycles res_latency, InOrderCPU *_cpu,
                        ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 {
diff --git a/src/cpu/inorder/resources/decode_unit.hh b/src/cpu/inorder/resources/decode_unit.hh
index 084c0008f..65f82a94b 100644
--- a/src/cpu/inorder/resources/decode_unit.hh
+++ b/src/cpu/inorder/resources/decode_unit.hh
@@ -48,7 +48,8 @@ class DecodeUnit : public Resource {
 
   public:
     DecodeUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+               Cycles res_latency, InOrderCPU *_cpu,
+               ThePipeline::Params *params);
 
     enum Command {
         DecodeInst
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 16f737308..296d5126f 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -44,7 +44,7 @@ using namespace std;
 using namespace ThePipeline;
 
 ExecutionUnit::ExecutionUnit(string res_name, int res_id, int res_width,
-                             int res_latency, InOrderCPU *_cpu,
+                             Cycles res_latency, InOrderCPU *_cpu,
                              ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       lastExecuteTick(0), lastControlTick(0)
diff --git a/src/cpu/inorder/resources/execution_unit.hh b/src/cpu/inorder/resources/execution_unit.hh
index bebb69ca3..e87a05c27 100644
--- a/src/cpu/inorder/resources/execution_unit.hh
+++ b/src/cpu/inorder/resources/execution_unit.hh
@@ -51,7 +51,8 @@ class ExecutionUnit : public Resource {
 
   public:
     ExecutionUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+                  Cycles res_latency, InOrderCPU *_cpu,
+                  ThePipeline::Params *params);
 
   public:
     void regStats();
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.cc b/src/cpu/inorder/resources/fetch_seq_unit.cc
index 6bab9ea50..3d3e3cc9b 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.cc
+++ b/src/cpu/inorder/resources/fetch_seq_unit.cc
@@ -40,7 +40,7 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 FetchSeqUnit::FetchSeqUnit(std::string res_name, int res_id, int res_width,
-                           int res_latency, InOrderCPU *_cpu,
+                           Cycles res_latency, InOrderCPU *_cpu,
                            ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       instSize(sizeof(MachInst))
diff --git a/src/cpu/inorder/resources/fetch_seq_unit.hh b/src/cpu/inorder/resources/fetch_seq_unit.hh
index 1cd0047e2..4cb18a1c7 100644
--- a/src/cpu/inorder/resources/fetch_seq_unit.hh
+++ b/src/cpu/inorder/resources/fetch_seq_unit.hh
@@ -54,7 +54,8 @@ class FetchSeqUnit : public Resource {
 
   public:
     FetchSeqUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+                 Cycles res_latency, InOrderCPU *_cpu,
+                 ThePipeline::Params *params);
     ~FetchSeqUnit();
     
     void init();
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 07669ef2a..0ed59fe2d 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -53,7 +53,7 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 FetchUnit::FetchUnit(string res_name, int res_id, int res_width,
-                     int res_latency, InOrderCPU *_cpu,
+                     Cycles res_latency, InOrderCPU *_cpu,
                      ThePipeline::Params *params)
     : CacheUnit(res_name, res_id, res_width, res_latency, _cpu, params),
       instSize(sizeof(TheISA::MachInst)), fetchBuffSize(params->fetchBuffSize)
diff --git a/src/cpu/inorder/resources/fetch_unit.hh b/src/cpu/inorder/resources/fetch_unit.hh
index 82d5d99e0..d1c7b22c0 100644
--- a/src/cpu/inorder/resources/fetch_unit.hh
+++ b/src/cpu/inorder/resources/fetch_unit.hh
@@ -53,7 +53,8 @@ class FetchUnit : public CacheUnit
 {
   public:
     FetchUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+              Cycles res_latency, InOrderCPU *_cpu,
+              ThePipeline::Params *params);
 
     virtual ~FetchUnit();
 
diff --git a/src/cpu/inorder/resources/graduation_unit.cc b/src/cpu/inorder/resources/graduation_unit.cc
index c69e55512..ea63527b6 100644
--- a/src/cpu/inorder/resources/graduation_unit.cc
+++ b/src/cpu/inorder/resources/graduation_unit.cc
@@ -35,7 +35,7 @@
 using namespace ThePipeline;
 
 GraduationUnit::GraduationUnit(std::string res_name, int res_id, int res_width,
-                               int res_latency, InOrderCPU *_cpu,
+                               Cycles res_latency, InOrderCPU *_cpu,
                                ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 {
diff --git a/src/cpu/inorder/resources/graduation_unit.hh b/src/cpu/inorder/resources/graduation_unit.hh
index 836b568a6..69d3322fe 100644
--- a/src/cpu/inorder/resources/graduation_unit.hh
+++ b/src/cpu/inorder/resources/graduation_unit.hh
@@ -52,7 +52,7 @@ class GraduationUnit : public Resource {
 
   public:
     GraduationUnit(std::string res_name, int res_id, int res_width,
-                   int res_latency, InOrderCPU *_cpu,
+                   Cycles res_latency, InOrderCPU *_cpu,
                    ThePipeline::Params *params);
 
     void execute(int slot_num);
diff --git a/src/cpu/inorder/resources/inst_buffer.cc b/src/cpu/inorder/resources/inst_buffer.cc
index d64eb79f1..19011059f 100644
--- a/src/cpu/inorder/resources/inst_buffer.cc
+++ b/src/cpu/inorder/resources/inst_buffer.cc
@@ -45,7 +45,7 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 InstBuffer::InstBuffer(string res_name, int res_id, int res_width,
-                       int res_latency, InOrderCPU *_cpu,
+                       Cycles res_latency, InOrderCPU *_cpu,
                        ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 { }
diff --git a/src/cpu/inorder/resources/inst_buffer.hh b/src/cpu/inorder/resources/inst_buffer.hh
index d0047e013..78ef900c6 100644
--- a/src/cpu/inorder/resources/inst_buffer.hh
+++ b/src/cpu/inorder/resources/inst_buffer.hh
@@ -56,7 +56,8 @@ class InstBuffer : public Resource {
 
   public:
     InstBuffer(std::string res_name, int res_id, int res_width,
-               int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+               Cycles res_latency, InOrderCPU *_cpu,
+               ThePipeline::Params *params);
 
     void regStats();
 
diff --git a/src/cpu/inorder/resources/mem_dep_unit.hh b/src/cpu/inorder/resources/mem_dep_unit.hh
index 387bee0b9..4e512de58 100644
--- a/src/cpu/inorder/resources/mem_dep_unit.hh
+++ b/src/cpu/inorder/resources/mem_dep_unit.hh
@@ -47,7 +47,7 @@ class MemDepUnit : public Resource {
 
   public:
     MemDepUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu);
+               Cycles res_latency, InOrderCPU *_cpu);
     virtual ~MemDepUnit() {}
 
     virtual void execute(int slot_num);
diff --git a/src/cpu/inorder/resources/mult_div_unit.cc b/src/cpu/inorder/resources/mult_div_unit.cc
index ab0081787..5a4d4bb55 100644
--- a/src/cpu/inorder/resources/mult_div_unit.cc
+++ b/src/cpu/inorder/resources/mult_div_unit.cc
@@ -43,7 +43,7 @@ using namespace std;
 using namespace ThePipeline;
 
 MultDivUnit::MultDivUnit(string res_name, int res_id, int res_width,
-                         int res_latency, InOrderCPU *_cpu,
+                         Cycles res_latency, InOrderCPU *_cpu,
                          ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu),
       multRepeatRate(params->multRepeatRate),
diff --git a/src/cpu/inorder/resources/mult_div_unit.hh b/src/cpu/inorder/resources/mult_div_unit.hh
index 7d179bdce..d855dbb9d 100644
--- a/src/cpu/inorder/resources/mult_div_unit.hh
+++ b/src/cpu/inorder/resources/mult_div_unit.hh
@@ -56,7 +56,7 @@ class MultDivUnit : public Resource {
 
   public:
     MultDivUnit(std::string res_name, int res_id, int res_width,
-                int res_latency, InOrderCPU *_cpu,
+                Cycles res_latency, InOrderCPU *_cpu,
                 ThePipeline::Params *params);
 
   public:
@@ -86,23 +86,23 @@ class MultDivUnit : public Resource {
   protected:
     /** Latency & Repeat Rate for Multiply Insts */
     unsigned multRepeatRate;
-    unsigned multLatency;
+    Cycles multLatency;
 
     /** Latency & Repeat Rate for 8-bit Divide Insts */
     unsigned div8RepeatRate;
-    unsigned div8Latency;
+    Cycles div8Latency;
 
     /** Latency & Repeat Rate for 16-bit Divide Insts */
     unsigned div16RepeatRate;
-    unsigned div16Latency;
+    Cycles div16Latency;
 
     /** Latency & Repeat Rate for 24-bit Divide Insts */
     unsigned div24RepeatRate;
-    unsigned div24Latency;
+    Cycles div24Latency;
 
     /** Latency & Repeat Rate for 32-bit Divide Insts */
     unsigned div32RepeatRate;
-    unsigned div32Latency;
+    Cycles div32Latency;
 
     /** Last cycle that MDU was used */
     Tick lastMDUCycle;
diff --git a/src/cpu/inorder/resources/tlb_unit.cc b/src/cpu/inorder/resources/tlb_unit.cc
index c07f6ae5f..c2619f15e 100644
--- a/src/cpu/inorder/resources/tlb_unit.cc
+++ b/src/cpu/inorder/resources/tlb_unit.cc
@@ -44,7 +44,8 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 TLBUnit::TLBUnit(string res_name, int res_id, int res_width,
-                 int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params)
+                 Cycles res_latency, InOrderCPU *_cpu,
+                 ThePipeline::Params *params)
 : Resource(res_name, res_id, res_width, res_latency, _cpu)
 {
     // Hard-Code Selection For Now
diff --git a/src/cpu/inorder/resources/tlb_unit.hh b/src/cpu/inorder/resources/tlb_unit.hh
index 6846bdc87..916f67559 100644
--- a/src/cpu/inorder/resources/tlb_unit.hh
+++ b/src/cpu/inorder/resources/tlb_unit.hh
@@ -55,7 +55,8 @@ class TLBUnit : public Resource
 
   public:
     TLBUnit(std::string res_name, int res_id, int res_width,
-              int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+            Cycles res_latency, InOrderCPU *_cpu,
+            ThePipeline::Params *params);
     virtual ~TLBUnit() {}
 
     void init();
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 38a2eb040..e10238758 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -45,7 +45,7 @@ using namespace TheISA;
 using namespace ThePipeline;
 
 UseDefUnit::UseDefUnit(string res_name, int res_id, int res_width,
-                       int res_latency, InOrderCPU *_cpu,
+                       Cycles res_latency, InOrderCPU *_cpu,
                        ThePipeline::Params *params)
     : Resource(res_name, res_id, res_width, res_latency, _cpu)
 {
@@ -107,7 +107,7 @@ void
 UseDefUnit::init()
 {
     // Set Up Resource Events to Appropriate Resource BandWidth
-    if (latency > 0) {
+    if (latency > Cycles(0)) {
         resourceEvent = new ResourceEvent[width];
     } else {
         resourceEvent = NULL;
diff --git a/src/cpu/inorder/resources/use_def.hh b/src/cpu/inorder/resources/use_def.hh
index 9581bc5f5..9eb516345 100644
--- a/src/cpu/inorder/resources/use_def.hh
+++ b/src/cpu/inorder/resources/use_def.hh
@@ -56,7 +56,8 @@ class UseDefUnit : public Resource {
 
   public:
     UseDefUnit(std::string res_name, int res_id, int res_width,
-               int res_latency, InOrderCPU *_cpu, ThePipeline::Params *params);
+               Cycles res_latency, InOrderCPU *_cpu,
+               ThePipeline::Params *params);
 
     void init();