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authorKorey Sewell <ksewell@umich.edu>2009-05-12 15:01:14 -0400
committerKorey Sewell <ksewell@umich.edu>2009-05-12 15:01:14 -0400
commit98b1452058ae7e82df7cb7c0373c62a97981a2b9 (patch)
treedcc1d95c125bc692daac52ff7aecf1d04dd12c6c /src/cpu/inorder/resources
parent2012202b06a620998709f605f8f8692ad718294d (diff)
downloadgem5-98b1452058ae7e82df7cb7c0373c62a97981a2b9.tar.xz
inorder-miscregs: Fix indexing for misc. reg operands and update result-types for better tracing of these types of values
Diffstat (limited to 'src/cpu/inorder/resources')
-rw-r--r--src/cpu/inorder/resources/cache_unit.cc5
-rw-r--r--src/cpu/inorder/resources/execution_unit.cc15
-rw-r--r--src/cpu/inorder/resources/use_def.cc32
3 files changed, 31 insertions, 21 deletions
diff --git a/src/cpu/inorder/resources/cache_unit.cc b/src/cpu/inorder/resources/cache_unit.cc
index d273d7247..1b5d07450 100644
--- a/src/cpu/inorder/resources/cache_unit.cc
+++ b/src/cpu/inorder/resources/cache_unit.cc
@@ -483,6 +483,9 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
DPRINTF(InOrderCachePort,
"[tid:%u]: [sn:%i]: Data loaded was: %08p\n",
tid, inst->seqNum, inst->readIntResult(0));
+ DPRINTF(InOrderCachePort,
+ "[tid:%u]: [sn:%i]: FP Data loaded was: %08p\n",
+ tid, inst->seqNum, inst->readFloatResult(0));
} else if(inst->isStore()) {
assert(cache_pkt->isWrite());
@@ -594,7 +597,7 @@ CacheUnit::getMemData(Packet *packet)
case 32:
return packet->get<uint32_t>();
- case 864:
+ case 64:
return packet->get<uint64_t>();
default:
diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 60cbac8af..16f00b1be 100644
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -68,8 +68,8 @@ ExecutionUnit::execute(int slot_num)
exec_req->fault = NoFault;
- DPRINTF(InOrderExecute, "[tid:%i] Executing [sn:%i] [PC:%#x] .\n",
- tid, seq_num, inst->readPC());
+ DPRINTF(InOrderExecute, "[tid:%i] Executing [sn:%i] [PC:%#x] %s.\n",
+ tid, seq_num, inst->readPC(), inst->instName());
switch (exec_req->cmd)
{
@@ -163,11 +163,9 @@ ExecutionUnit::execute(int slot_num)
}
} else {
DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: Prediction Correct.\n",
- inst->readTid(), seq_num, inst->readIntResult(0));
+ inst->readTid(), seq_num);
}
- DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: The result of execution is 0x%x.\n",
- inst->readTid(), seq_num, inst->readIntResult(0));
exec_req->done();
} else {
warn("inst [sn:%i] had a %s fault", seq_num, fault->name());
@@ -178,10 +176,13 @@ ExecutionUnit::execute(int slot_num)
if (fault == NoFault) {
inst->setExecuted();
- exec_req->done();
DPRINTF(InOrderExecute, "[tid:%i]: [sn:%i]: The result of execution is 0x%x.\n",
- inst->readTid(), seq_num, inst->readIntResult(0));
+ inst->readTid(), seq_num, (inst->resultType(0) == InOrderDynInst::Float) ?
+ inst->readFloatResult(0) : (inst->resultType(0) == InOrderDynInst::Double) ?
+ inst->readDoubleResult(0) : inst->readIntResult(0));
+
+ exec_req->done();
} else {
warn("inst [sn:%i] had a %s fault", seq_num, fault->name());
cpu->trap(fault, tid);
diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index a9281a18c..4a6acf7c8 100644
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -119,28 +119,28 @@ UseDefUnit::execute(int slot_idx)
{
int reg_idx = inst->_srcRegIdx[ud_idx];
- DPRINTF(InOrderUseDef, "[tid:%i]: Attempting to read source register idx %i.\n",
- tid, ud_idx);
+ DPRINTF(InOrderUseDef, "[tid:%i]: Attempting to read source register idx %i (reg #%i).\n",
+ tid, ud_idx, reg_idx);
// Ask register dependency map if it is OK to read from Arch. Reg. File
if (regDepMap[tid]->canRead(reg_idx, inst)) {
// Read From Register File
if (inst->seqNum <= outReadSeqNum[tid]) {
if (reg_idx <= FP_Base_DepTag) {
- DPRINTF(InOrderUseDef, "[tid:%i]: Reading Int Reg %i from Register File.\n",
- tid, reg_idx);
+ DPRINTF(InOrderUseDef, "[tid:%i]: Reading Int Reg %i from Register File:%i.\n",
+ tid, reg_idx, cpu->readIntReg(reg_idx,inst->readTid()));
inst->setIntSrc(ud_idx,
cpu->readIntReg(reg_idx,inst->readTid()));
} else if (reg_idx <= Ctrl_Base_DepTag) {
reg_idx -= FP_Base_DepTag;
- DPRINTF(InOrderUseDef, "[tid:%i]: Reading Float Reg %i from Register File.\n",
- tid, reg_idx);
+ DPRINTF(InOrderUseDef, "[tid:%i]: Reading Float Reg %i from Register File:%x.\n",
+ tid, reg_idx, cpu->readFloatRegBits(reg_idx, inst->readTid()));
inst->setIntSrc(ud_idx, // Always Read FloatRegBits For Now
cpu->readFloatRegBits(reg_idx, inst->readTid()));
} else {
reg_idx -= Ctrl_Base_DepTag;
- DPRINTF(InOrderUseDef, "[tid:%i]: Reading Misc Reg %i from Register File.\n",
- tid, reg_idx);
+ DPRINTF(InOrderUseDef, "[tid:%i]: Reading Misc Reg %i from Register File:%i.\n",
+ tid, reg_idx, cpu->readMiscReg(reg_idx, inst->readTid()));
inst->setIntSrc(ud_idx,
cpu->readMiscReg(reg_idx, inst->readTid()));
}
@@ -208,12 +208,12 @@ UseDefUnit::execute(int slot_idx)
int reg_idx = inst->_destRegIdx[ud_idx];
if (regDepMap[tid]->canWrite(reg_idx, inst)) {
- DPRINTF(InOrderUseDef, "[tid:%i]: Attempting to write to Register File.\n",
- tid);
+ DPRINTF(InOrderUseDef, "[tid:%i]: Flattening register idx %i & Attempting to write to Register File.\n",
+ tid, reg_idx);
if (inst->seqNum <= outReadSeqNum[tid]) {
if (reg_idx <= FP_Base_DepTag) {
- DPRINTF(InOrderUseDef, "[tid:%i]: Writing 0x%x to register idx %i.\n",
+ DPRINTF(InOrderUseDef, "[tid:%i]: Writing Int. Result 0x%x to register idx %i.\n",
tid, inst->readIntResult(ud_idx), reg_idx);
// Remove Dependencies
@@ -223,6 +223,8 @@ UseDefUnit::execute(int slot_idx)
inst->readIntResult(ud_idx),
inst->readTid());
} else if(reg_idx <= Ctrl_Base_DepTag) {
+ DPRINTF(InOrderUseDef, "[tid:%i]: Writing FP Result 0x%x (bits:0x%x) to register idx %i.\n",
+ tid, inst->readFloatResult(ud_idx), inst->readIntResult(ud_idx), reg_idx);
// Remove Dependencies
regDepMap[tid]->removeFront(reg_idx, inst);
@@ -233,13 +235,17 @@ UseDefUnit::execute(int slot_idx)
inst->readFloatResult(ud_idx),
inst->readTid());
} else {
+ DPRINTF(InOrderUseDef, "[tid:%i]: Writing Misc. 0x%x to register idx %i.\n",
+ tid, inst->readIntResult(ud_idx), reg_idx);
+
// Remove Dependencies
regDepMap[tid]->removeFront(reg_idx, inst);
reg_idx -= Ctrl_Base_DepTag;
+
cpu->setMiscReg(reg_idx,
- inst->readIntResult(ud_idx),
- inst->readTid());
+ inst->readIntResult(ud_idx),
+ inst->readTid());
}
outWriteSeqNum[tid] = maxSeqNum;