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author | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:32 -0500 |
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committer | Korey Sewell <ksewell@umich.edu> | 2010-01-31 18:26:32 -0500 |
commit | e1fcc6498017574735362636791f9ad73fb39b04 (patch) | |
tree | da58049ba1b2c6b52dced5aa8928cb6fc27485ab /src/cpu/inorder/thread_context.cc | |
parent | 4a945aab1958d39fcfea4608715e77d5112809cf (diff) | |
download | gem5-e1fcc6498017574735362636791f9ad73fb39b04.tar.xz |
inorder: activate thread on cache miss
-Support ability to activate next ready thread after a cache miss
through the activateNextReadyContext/Thread() functions
-To support this a "readyList" of thread ids is added
-After a cache miss, thread will suspend and then call
activitynextreadythread
Diffstat (limited to 'src/cpu/inorder/thread_context.cc')
-rw-r--r-- | src/cpu/inorder/thread_context.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index 41d16b633..d2f511b9d 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -242,21 +242,21 @@ InOrderThreadContext::setRegOtherThread(int misc_reg, const MiscReg &val, void InOrderThreadContext::setPC(uint64_t val) { - DPRINTF(InOrderCPU, "Setting PC to %08p\n", val); + DPRINTF(InOrderCPU, "[tid:%i] Setting PC to %08p\n", thread->readTid(), val); cpu->setPC(val, thread->readTid()); } void InOrderThreadContext::setNextPC(uint64_t val) { - DPRINTF(InOrderCPU, "Setting NPC to %08p\n", val); + DPRINTF(InOrderCPU, "[tid:%i] Setting NPC to %08p\n", thread->readTid(), val); cpu->setNextPC(val, thread->readTid()); } void InOrderThreadContext::setNextNPC(uint64_t val) { - DPRINTF(InOrderCPU, "Setting NNPC to %08p\n", val); + DPRINTF(InOrderCPU, "[tid:%i] Setting NNPC to %08p\n", thread->readTid(), val); cpu->setNextNPC(val, thread->readTid()); } |