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author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:44 -0500 |
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committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:44 -0500 |
commit | e2dad8236a95b5d7b1c1470385d0b543d3c7af4a (patch) | |
tree | 5b10bce38b63a506733c0d219a8abecce1eb013d /src/cpu/inorder/thread_context.cc | |
parent | 17b47d35e1d0dedca7a3336f1193b1a502bcd78b (diff) | |
download | gem5-e2dad8236a95b5d7b1c1470385d0b543d3c7af4a.tar.xz |
cpu: Implement a flat register interface in thread contexts
Some architectures map registers differently depending on their mode
of operations. There is currently no architecture independent way of
accessing all registers. This patch introduces a flat register
interface to the ThreadContext class. This interface is useful, for
example, when serializing or copying thread contexts.
Diffstat (limited to 'src/cpu/inorder/thread_context.cc')
-rw-r--r-- | src/cpu/inorder/thread_context.cc | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index 6b3375a52..4abfb6cca 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2012 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2007 MIPS Technologies, Inc. * All rights reserved. * @@ -249,3 +261,46 @@ InOrderThreadContext::setMiscReg(int misc_reg, const MiscReg &val) { cpu->setMiscReg(misc_reg, val, thread->threadId()); } + + +uint64_t +InOrderThreadContext::readIntRegFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readIntReg(idx, tid); +} + +void +InOrderThreadContext::setIntRegFlat(int idx, uint64_t val) +{ + const ThreadID tid = thread->threadId(); + cpu->setIntReg(idx, val, tid); +} + +FloatReg +InOrderThreadContext::readFloatRegFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readFloatReg(idx, tid); +} + +void +InOrderThreadContext::setFloatRegFlat(int idx, FloatReg val) +{ + const ThreadID tid = thread->threadId(); + cpu->setFloatReg(idx, val, tid); +} + +FloatRegBits +InOrderThreadContext::readFloatRegBitsFlat(int idx) +{ + const ThreadID tid = thread->threadId(); + return cpu->readFloatRegBits(idx, tid); +} + +void +InOrderThreadContext::setFloatRegBitsFlat(int idx, FloatRegBits val) +{ + const ThreadID tid = thread->threadId(); + cpu->setFloatRegBits(idx, val, tid); +} |