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author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
---|---|---|
committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-20 17:18:35 -0400 |
commit | e1403fc2af61c224c573c47c77a36f9b1b78e7df (patch) | |
tree | 07647bb8697ac256d180bf8de35080eee2a63f3e /src/cpu/inorder | |
parent | 2b0438a11eb6a9640b06da91e8a300d0ac3ad81a (diff) | |
download | gem5-e1403fc2af61c224c573c47c77a36f9b1b78e7df.tar.xz |
alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate
activate(), suspend(), and halt() used on thread contexts had an optional
delay parameter. However this parameter was often ignored. Also, when used,
the delay was seemily arbitrarily set to 0 or 1 cycle (no other delays were
ever specified). This patch removes the delay parameter and 'Events'
associated with them across all ISAs and cores. Unused activate logic
is also removed.
Diffstat (limited to 'src/cpu/inorder')
-rw-r--r-- | src/cpu/inorder/cpu.cc | 12 | ||||
-rw-r--r-- | src/cpu/inorder/cpu.hh | 6 | ||||
-rw-r--r-- | src/cpu/inorder/thread_context.cc | 8 | ||||
-rw-r--r-- | src/cpu/inorder/thread_context.hh | 13 |
4 files changed, 19 insertions, 20 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc index c825f2979..86a44ab38 100644 --- a/src/cpu/inorder/cpu.cc +++ b/src/cpu/inorder/cpu.cc @@ -1090,11 +1090,11 @@ InOrderCPU::activateThreadInPipeline(ThreadID tid) } void -InOrderCPU::deactivateContext(ThreadID tid, Cycles delay) +InOrderCPU::deactivateContext(ThreadID tid) { DPRINTF(InOrderCPU,"[tid:%i]: Deactivating ...\n", tid); - scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid], delay); + scheduleCpuEvent(DeactivateThread, NoFault, tid, dummyInst[tid]); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. @@ -1172,12 +1172,12 @@ InOrderCPU::tickThreadStats() } void -InOrderCPU::activateContext(ThreadID tid, Cycles delay) +InOrderCPU::activateContext(ThreadID tid) { DPRINTF(InOrderCPU,"[tid:%i]: Activating ...\n", tid); - scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid], delay); + scheduleCpuEvent(ActivateThread, NoFault, tid, dummyInst[tid]); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. @@ -1187,12 +1187,12 @@ InOrderCPU::activateContext(ThreadID tid, Cycles delay) } void -InOrderCPU::activateNextReadyContext(Cycles delay) +InOrderCPU::activateNextReadyContext() { DPRINTF(InOrderCPU,"Activating next ready thread\n"); scheduleCpuEvent(ActivateNextReadyThread, NoFault, 0/*tid*/, dummyInst[0], - delay, ActivateNextReadyThread_Pri); + Cycles(0), ActivateNextReadyThread_Pri); // Be sure to signal that there's some activity so the CPU doesn't // deschedule itself. diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh index 7efd5ae21..b82aba779 100644 --- a/src/cpu/inorder/cpu.hh +++ b/src/cpu/inorder/cpu.hh @@ -498,7 +498,7 @@ class InOrderCPU : public BaseCPU void trap(const Fault &fault, ThreadID tid, DynInstPtr inst); /** Schedule thread activation on the CPU */ - void activateContext(ThreadID tid, Cycles delay = Cycles(0)); + void activateContext(ThreadID tid); /** Add Thread to Active Threads List. */ void activateThread(ThreadID tid); @@ -507,13 +507,13 @@ class InOrderCPU : public BaseCPU void activateThreadInPipeline(ThreadID tid); /** Schedule Thread Activation from Ready List */ - void activateNextReadyContext(Cycles delay = Cycles(0)); + void activateNextReadyContext(); /** Add Thread From Ready List to Active Threads List. */ void activateNextReadyThread(); /** Schedule a thread deactivation on the CPU */ - void deactivateContext(ThreadID tid, Cycles delay = Cycles(0)); + void deactivateContext(ThreadID tid); /** Remove from Active Thread List */ void deactivateThread(ThreadID tid); diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc index 763cc6df2..1fc66d827 100644 --- a/src/cpu/inorder/thread_context.cc +++ b/src/cpu/inorder/thread_context.cc @@ -103,7 +103,7 @@ InOrderThreadContext::takeOverFrom(ThreadContext *old_context) } void -InOrderThreadContext::activate(Cycles delay) +InOrderThreadContext::activate() { DPRINTF(InOrderCPU, "Calling activate on Thread Context %d\n", getThreadNum()); @@ -113,12 +113,12 @@ InOrderThreadContext::activate(Cycles delay) thread->setStatus(ThreadContext::Active); - cpu->activateContext(thread->threadId(), delay); + cpu->activateContext(thread->threadId()); } void -InOrderThreadContext::suspend(Cycles delay) +InOrderThreadContext::suspend() { DPRINTF(InOrderCPU, "Calling suspend on Thread Context %d\n", getThreadNum()); @@ -131,7 +131,7 @@ InOrderThreadContext::suspend(Cycles delay) } void -InOrderThreadContext::halt(Cycles delay) +InOrderThreadContext::halt() { DPRINTF(InOrderCPU, "Calling halt on Thread Context %d\n", getThreadNum()); diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh index 2e525eb2a..e29b8f273 100644 --- a/src/cpu/inorder/thread_context.hh +++ b/src/cpu/inorder/thread_context.hh @@ -179,15 +179,14 @@ class InOrderThreadContext : public ThreadContext void setStatus(Status new_status) { thread->setStatus(new_status); } - /** Set the status to Active. Optional delay indicates number of - * cycles to wait before beginning execution. */ - void activate(Cycles delay = Cycles(1)); + /** Set the status to Active. */ + void activate(); /** Set the status to Suspended. */ - void suspend(Cycles delay = Cycles(0)); + void suspend(); /** Set the status to Halted. */ - void halt(Cycles delay = Cycles(0)); + void halt(); /** Takes over execution of a thread from another CPU. */ void takeOverFrom(ThreadContext *old_context); @@ -279,8 +278,8 @@ class InOrderThreadContext : public ThreadContext int flattenMiscIndex(int reg) { return cpu->isa[thread->threadId()]->flattenMiscIndex(reg); } - void activateContext(Cycles delay) - { cpu->activateContext(thread->threadId(), delay); } + void activateContext() + { cpu->activateContext(thread->threadId()); } void deallocateContext() { cpu->deallocateContext(thread->threadId()); } |