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authorAndreas Hansson <andreas.hansson@arm.com>2012-03-19 06:36:09 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-03-19 06:36:09 -0400
commit72538294fb1eb2e4dcd5d818c78bcdf78b0de491 (patch)
treeba95d431b41d54c7c25a3b5e84dfca9707a9feb2 /src/cpu/inorder
parentadb862103138caf11191da50d34eb4c93295633a (diff)
downloadgem5-72538294fb1eb2e4dcd5d818c78bcdf78b0de491.tar.xz
gcc: Clean-up of non-C++0x compliant code, first steps
This patch cleans up a number of minor issues aiming to get closer to compliance with the C++0x standard as interpreted by gcc and clang (compile with std=c++0x and -pedantic-errors). In particular, the patch cleans up enums where the last item was succeded by a comma, namespaces closed by a curcly brace followed by a semi-colon, and the use of the GNU-extension typeof (replaced by templated functions). It does not address variable-length arrays, zero-size arrays, anonymous structs, range expressions in switch statements, and the use of long long. The generated CPU code also has a large number of issues that remain to be fixed, mainly related to overflows in implicit constant conversion (due to shifts).
Diffstat (limited to 'src/cpu/inorder')
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.hh2
-rw-r--r--src/cpu/inorder/pipeline_traits.hh2
-rw-r--r--src/cpu/inorder/resource.hh2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index 48620475a..4b48a157b 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -103,7 +103,7 @@ class InOrderDynInst : public FastAlloc, public RefCounted
enum {
MaxInstSrcRegs = TheISA::MaxInstSrcRegs, /// Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, /// Max dest regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs /// Max dest regs
};
public:
diff --git a/src/cpu/inorder/pipeline_traits.hh b/src/cpu/inorder/pipeline_traits.hh
index dd12a8f1d..5df61368f 100644
--- a/src/cpu/inorder/pipeline_traits.hh
+++ b/src/cpu/inorder/pipeline_traits.hh
@@ -77,7 +77,7 @@ namespace ThePipeline {
//////////////////////////
typedef ResourceSked ResSchedule;
typedef ResourceSked* RSkedPtr;
-};
+}
diff --git a/src/cpu/inorder/resource.hh b/src/cpu/inorder/resource.hh
index 8822a3620..3c1a8cc47 100644
--- a/src/cpu/inorder/resource.hh
+++ b/src/cpu/inorder/resource.hh
@@ -263,7 +263,7 @@ class ResourceEvent : public Event
/// (for InOrderCPU model).
/// check src/sim/eventq.hh for more event priorities.
enum InOrderPriority {
- Resource_Event_Pri = 45,
+ Resource_Event_Pri = 45
};
/** The Resource Slot that this event is servicing */