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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:45 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2013-01-07 13:05:45 -0500
commit2cfe62adc4f9206f616669a103133b906f705e8b (patch)
tree8dc7c3253a50302aecd990182f562c779cf02b85 /src/cpu/inorder
parentf7da0fddd1506c9fe2325c1720bf08635ac7db05 (diff)
downloadgem5-2cfe62adc4f9206f616669a103133b906f705e8b.tar.xz
cpu: Rename defer_registration->switched_out
The defer_registration parameter is used to prevent a CPU from initializing at startup, leaving it in the "switched out" mode. The name of this parameter (and the help string) is confusing. This patch renames it to switched_out, which should be more descriptive.
Diffstat (limited to 'src/cpu/inorder')
-rw-r--r--src/cpu/inorder/cpu.cc7
-rw-r--r--src/cpu/inorder/cpu.hh3
2 files changed, 3 insertions, 7 deletions
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 3582e55ca..87272da7f 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -242,7 +242,6 @@ InOrderCPU::InOrderCPU(Params *params)
resReqCount(0),
#endif // DEBUG
drainCount(0),
- deferRegistration(false/*params->deferRegistration*/),
stageTracing(params->stageTracing),
lastRunningCycle(0),
instsPerSwitch(0)
@@ -386,7 +385,7 @@ InOrderCPU::InOrderCPU(Params *params)
}
// InOrderCPU always requires an interrupt controller.
- if (!params->defer_registration && !interrupts) {
+ if (!params->switched_out && !interrupts) {
fatal("InOrderCPU %s has no interrupt controller.\n"
"Ensure createInterruptController() is called.\n", name());
}
@@ -787,7 +786,7 @@ InOrderCPU::init()
{
BaseCPU::init();
- if (!params()->defer_registration &&
+ if (!params()->switched_out &&
system->getMemoryMode() != Enums::timing) {
fatal("The in-order CPU requires the memory system to be in "
"'timing' mode.\n");
@@ -801,7 +800,7 @@ InOrderCPU::init()
thread[tid]->initMemProxies(thread[tid]->getTC());
}
- if (FullSystem && !params()->defer_registration) {
+ if (FullSystem && !params()->switched_out) {
for (ThreadID tid = 0; tid < numThreads; tid++) {
ThreadContext *src_tc = threadContexts[tid];
TheISA::initCPU(src_tc, src_tc->contextId());
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index acdac11d9..1037ea2e6 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -856,9 +856,6 @@ class InOrderCPU : public BaseCPU
/** Pointers to all of the threads in the CPU. */
std::vector<Thread *> thread;
- /** Whether or not the CPU should defer its registration. */
- bool deferRegistration;
-
/** Per-Stage Instruction Tracing */
bool stageTracing;