Give TimeBuffer an ID that can be set. Necessary because InOrder uses generic stages so w/o an ID there is no way to differentiate buffers when debugging

2 files changed, 6 insertions, 7 deletions

diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 94a6efce9..1836989af 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -230,11 +230,9 @@ InOrderCPU::InOrderCPU(Params *params)
     }
 
     // Initialize TimeBuffer Stage Queues
-    // For now just have these time buffers be pretty big.
-    // @note: This could be statically allocated but changes
-    // would have to be made to the standard time buffer class.
     for (int stNum=0; stNum < NumStages - 1; stNum++) {
         stageQueue[stNum] = new StageQueue(NumStages, NumStages);
+        stageQueue[stNum]->id(stNum);
     }
 
 
diff --git a/src/cpu/inorder/pipeline_stage.cc b/src/cpu/inorder/pipeline_stage.cc
index 547b42537..f356c0e1a 100644
--- a/src/cpu/inorder/pipeline_stage.cc
+++ b/src/cpu/inorder/pipeline_stage.cc
@@ -556,8 +556,8 @@ PipelineStage::sortInsts()
     if (prevStageValid) {
         int insts_from_prev_stage = prevStage->size;
 
-        DPRINTF(InOrderStage, "%i insts available from previous stage.\n",
-                insts_from_prev_stage);
+        DPRINTF(InOrderStage, "%i insts available from stage buffer %i.\n",
+                insts_from_prev_stage, prevStageQueue->id());
 
         for (int i = 0; i < insts_from_prev_stage; ++i) {
 
@@ -985,8 +985,9 @@ PipelineStage::sendInstToNextStage(DynInstPtr inst)
                     tid, cpu->pipelineStage[next_stage]->stageBufferAvail());
 
             DPRINTF(InOrderStage, "[tid:%u]: [sn:%i]: being placed into  "
-                    "index %i stage %i queue.\n",
-                    tid, inst->seqNum, toNextStageIndex, inst->nextStage);
+                    "index %i of stage buffer %i queue.\n",
+                    tid, inst->seqNum, toNextStageIndex,
+                    cpu->pipelineStage[prev_stage]->nextStageQueue->id());
 
             int next_stage_idx = cpu->pipelineStage[prev_stage]->nextStage->size;