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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:15:44 -0800 |
| commit | 5605079b1f20bc7f6a4a80c8d1e4daabe7125270 (patch) | |
| tree | 29dfa1685e3e257e3857ef7f9672778d43582440 /src/cpu/inorder | |
| parent | a1aba01a02a8c1261120de83d8fbfd6624f0cb17 (diff) | |
| download | gem5-5605079b1f20bc7f6a4a80c8d1e4daabe7125270.tar.xz | |
ISA: Replace the translate functions in the TLBs with translateAtomic.
Diffstat (limited to 'src/cpu/inorder')
| -rw-r--r-- | src/cpu/inorder/resources/tlb_unit.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/inorder/resources/tlb_unit.cc b/src/cpu/inorder/resources/tlb_unit.cc index 4eeb4727b..321ac90f8 100644 --- a/src/cpu/inorder/resources/tlb_unit.cc +++ b/src/cpu/inorder/resources/tlb_unit.cc @@ -98,7 +98,7 @@ TLBUnit::execute(int slot_idx) case FetchLookup: { tlb_req->fault = - this->cpu->itb->translate(tlb_req->memReq, + this->cpu->itb->translateAtomic(tlb_req->memReq, cpu->thread[tid]->getTC()); if (tlb_req->fault != NoFault) { @@ -129,7 +129,7 @@ TLBUnit::execute(int slot_idx) tid, seq_num, tlb_req->memReq->getVaddr()); tlb_req->fault = - this->cpu->itb->translate(tlb_req->memReq, + this->cpu->itb->translateAtomic(tlb_req->memReq, cpu->thread[tid]->getTC()); if (tlb_req->fault != NoFault) { |