Decode: Pull instruction decoding out of the StaticInst class into its own.

This change pulls the instruction decoding machinery (including caches) out of
the StaticInst class and puts it into its own class. This has a few intrinsic
benefits. First, the StaticInst code, which has gotten to be quite large, gets
simpler. Second, the code that handles decode caching is now separated out
into its own component and can be looked at in isolation, making it easier to
understand. I took the opportunity to restructure the code a bit which will
hopefully also help.

Beyond that, this change also lays some ground work for each ISA to have its
own, potentially stateful decode object. We'd be able to include less
contextualizing information in the ExtMachInst objects since that context
would be applied at the decoder. Also, the decoder could "know" ahead of time
that all the instructions it's going to see are going to be, for instance, 64
bit mode, and it will have one less thing to check when it decodes them.
Because the decode caching mechanism has been separated out, it's now possible
to have multiple caches which correspond to different types of decoding
context. Having one cache for each element of the cross product of different
configurations may become prohibitive, so it may be desirable to clear out the
cache when relatively static state changes and not to have one for each
setting.

Because the decode function is no longer universally accessible as a static
member of the StaticInst class, a new function was added to the ThreadContexts
that returns the applicable decode object.

7 files changed, 19 insertions, 4 deletions

diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index d8552d9d3..07a013afc 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -1766,6 +1766,14 @@ InOrderCPU::getDTBPtr()
     return dtb_res->tlb();
 }
 
+Decoder *
+InOrderCPU::getDecoderPtr()
+{
+    FetchUnit *fetch_res =
+        dynamic_cast<FetchUnit*>(resPool->getResource(fetchPortIdx));
+    return &fetch_res->decoder;
+}
+
 Fault
 InOrderCPU::read(DynInstPtr inst, Addr addr,
                  uint8_t *data, unsigned size, unsigned flags)
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index a5616f8b1..098909cb7 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -305,6 +305,8 @@ class InOrderCPU : public BaseCPU
     TheISA::TLB *getITBPtr();
     TheISA::TLB *getDTBPtr();
 
+    Decoder *getDecoderPtr();
+
     /** Accessor Type for the SkedCache */
     typedef uint32_t SkedID;
 
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index 5343206c1..f65d2ea9f 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -94,9 +94,9 @@ InOrderDynInst::cpuId()
 }
 
 void
-InOrderDynInst::setMachInst(ExtMachInst machInst)
+InOrderDynInst::setStaticInst(StaticInstPtr si)
 {
-    staticInst = StaticInst::decode(machInst, pc.instAddr());
+    staticInst = si;
 
     for (int i = 0; i < this->staticInst->numDestRegs(); i++) {
         _destRegIdx[i] = this->staticInst->destRegIdx(i);
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index ecaf23aab..de9de5eff 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -324,7 +324,7 @@ class InOrderDynInst : public FastAlloc, public RefCounted
     std::string instName()
     { return (staticInst) ? staticInst->getName() : "undecoded-inst"; }
 
-    void setMachInst(ExtMachInst inst);
+    void setStaticInst(StaticInstPtr si);
 
     ExtMachInst getMachInst() { return staticInst->machInst; }
 
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 8ba6bdc9a..b32134e00 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -117,7 +117,7 @@ FetchUnit::createMachInst(std::list<FetchBlock*>::iterator fetch_it,
     ext_inst = predecoder[tid]->getExtMachInst(instPC);
 
     inst->pcState(instPC);
-    inst->setMachInst(ext_inst);
+    inst->setStaticInst(decoder.decode(ext_inst, instPC.instAddr()));
 }
 
 void
diff --git a/src/cpu/inorder/resources/fetch_unit.hh b/src/cpu/inorder/resources/fetch_unit.hh
index 250e53e6c..6d734d7e6 100644
--- a/src/cpu/inorder/resources/fetch_unit.hh
+++ b/src/cpu/inorder/resources/fetch_unit.hh
@@ -39,6 +39,7 @@
 #include "arch/predecoder.hh"
 #include "arch/tlb.hh"
 #include "config/the_isa.hh"
+#include "cpu/decode.hh"
 #include "cpu/inorder/resources/cache_unit.hh"
 #include "cpu/inorder/inorder_dyn_inst.hh"
 #include "cpu/inorder/pipeline_traits.hh"
@@ -88,6 +89,8 @@ class FetchUnit : public CacheUnit
 
     void trap(Fault fault, ThreadID tid, DynInstPtr inst);
 
+    Decoder decoder;
+
   private:
     void squashCacheRequest(CacheReqPtr req_ptr);
 
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 3b4e8dd7f..7ec17cb77 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -78,6 +78,8 @@ class InOrderThreadContext : public ThreadContext
     /** @TODO: PERF: Should we bind this to a pointer in constructor? */
     TheISA::TLB *getDTBPtr() { return cpu->getDTBPtr(); }
 
+    Decoder *getDecoderPtr() { return cpu->getDecoderPtr(); }
+
     System *getSystemPtr() { return cpu->system; }
 
     /** Returns a pointer to this CPU. */