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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-16 19:06:05 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-16 19:06:05 -0500 |
| commit | ecfd628ecd394f8e7df654ffc7c342d959e12e15 (patch) | |
| tree | d8d7740c4472718cea0f93bb4cbf04eff9e71421 /src/cpu/inst_seq.hh | |
| parent | 9d04510869fe66d59a168660925a8387c0fba1b8 (diff) | |
| download | gem5-ecfd628ecd394f8e7df654ffc7c342d959e12e15.tar.xz | |
Modify ISA and staticInst to support a IsFirstMicroOp flag
Increment instruction count on first micro-op instead of last
src/arch/sparc/isa/decoder.isa:
Implement a twin load for ASI_LDTX_P(0xe2)
src/arch/sparc/isa/formats/mem/blockmem.isa:
set the new flag IsFirstMicroOp when needed
src/cpu/simple/atomic.cc:
Increment instruction count on first micro-op instead of last (because if we take a fault on a micro coded instruction it should be counted twice acording to legion)
src/cpu/static_inst.hh:
Add IsFirstMicroop flag to static insts
--HG--
extra : convert_revision : 02bea93d38c03bbafe4570665eb4c01c11caa2fc
Diffstat (limited to 'src/cpu/inst_seq.hh')
0 files changed, 0 insertions, 0 deletions