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author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-29 13:25:14 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-07-29 13:25:14 -0700 |
commit | 08474ccf68e14f59b4517c6024a9bc6ecbd4a1d5 (patch) | |
tree | 5c1dc885b4fd33fc48d91a9ce489e24c88c9f3c2 /src/cpu/inteltrace.hh | |
parent | 4a7d0c4b79450e05b87da4cfc48c2361758127c1 (diff) | |
parent | 362ff1bcebd78c0c247e435eac657c8a1134b1fb (diff) | |
download | gem5-08474ccf68e14f59b4517c6024a9bc6ecbd4a1d5.tar.xz |
Merge Gabe's changes from head.
--HG--
extra : convert_revision : d00b7b09c7f19bc0e37b385ef7c124f69c0e917f
Diffstat (limited to 'src/cpu/inteltrace.hh')
-rw-r--r-- | src/cpu/inteltrace.hh | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/src/cpu/inteltrace.hh b/src/cpu/inteltrace.hh new file mode 100644 index 000000000..21afe0fc0 --- /dev/null +++ b/src/cpu/inteltrace.hh @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2001-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Steve Reinhardt + * Nathan Binkert + */ + +#ifndef __INTELTRACE_HH__ +#define __INTELTRACE_HH__ + +#include "base/trace.hh" +#include "cpu/static_inst.hh" +#include "sim/host.hh" +#include "sim/insttracer.hh" + +class ThreadContext; + + +namespace Trace { + +class IntelTraceRecord : public InstRecord +{ + public: + IntelTraceRecord(Tick _when, ThreadContext *_thread, + const StaticInstPtr &_staticInst, Addr _pc, bool spec) + : InstRecord(_when, _thread, _staticInst, _pc, spec) + { + } + + void dump(); +}; + +class IntelTrace : public InstTracer +{ + public: + + IntelTrace(const std::string & name) : InstTracer(name) + {} + + IntelTraceRecord * + getInstRecord(Tick when, ThreadContext *tc, + const StaticInstPtr staticInst, Addr pc) + { + if (!IsOn(ExecEnable)) + return NULL; + + if (!Trace::enabled) + return NULL; + + if (!IsOn(ExecSpeculative) && tc->misspeculating()) + return NULL; + + return new IntelTraceRecord(when, tc, + staticInst, pc, tc->misspeculating()); + } +}; + +/* namespace Trace */ } + +#endif // __EXETRACE_HH__ |