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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-06-01 19:44:17 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-06-01 19:44:17 +0100 |
| commit | dbfd6effe0e0a620ef0bdbbc9620e43dac622e83 (patch) | |
| tree | 77532a2f926f958e731ada4000f5a928833a0e75 /src/cpu/kvm/SConscript | |
| parent | 8e7c0575dc000fdc5b09114f012942b9e52eb303 (diff) | |
| download | gem5-dbfd6effe0e0a620ef0bdbbc9620e43dac622e83.tar.xz | |
kvm, arm, dev: Add an in-kernel GIC implementation
This changeset adds a GIC implementation that uses the kernel's
built-in support for simulating the interrupt controller. Since there
is currently no support for state transfer between gem5 and the
kernel, the device model does not support serialization and CPU
switching (which would require switching to a gem5-simulated GIC).
Diffstat (limited to 'src/cpu/kvm/SConscript')
| -rw-r--r-- | src/cpu/kvm/SConscript | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/kvm/SConscript b/src/cpu/kvm/SConscript index 8094cc585..5bb7580be 100644 --- a/src/cpu/kvm/SConscript +++ b/src/cpu/kvm/SConscript @@ -44,6 +44,7 @@ if env['USE_KVM']: SimObject('BaseKvmCPU.py') Source('base.cc') + Source('device.cc') Source('vm.cc') Source('perfevent.cc') Source('timer.cc') |