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| author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-04-22 13:20:32 -0400 |
|---|---|---|
| committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-04-22 13:20:32 -0400 |
| commit | 33ab8f735d0979ef68d7202d3adbf28f1ae2aceb (patch) | |
| tree | bebe6fd8140fc9b33c69af7897ed0cb2cc9409cd /src/cpu/kvm/arm_cpu.hh | |
| parent | 1c529a4196a5f9efcce5c639622d5b55912a472b (diff) | |
| download | gem5-33ab8f735d0979ef68d7202d3adbf28f1ae2aceb.tar.xz | |
kvm: Add support for pseudo-ops on ARM
This changeset adds support for m5 pseudo-ops when running in
kvm-mode. Unfortunately, we can't trap the normal gem5 co-processor
entry in KVM (it doesn't seem to be possible to trap accesses to
non-existing co-processors). We therefore use BZJ instructions to
cause a trap from virtualized mode into gem5. The BZJ instruction is
becomes a normal branch to the gem5 fallback code when running in
simulated mode, which means that this patch does not need to change
the ARM ISA-specific code.
Note: This requires a patched host kernel.
Diffstat (limited to 'src/cpu/kvm/arm_cpu.hh')
| -rw-r--r-- | src/cpu/kvm/arm_cpu.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/kvm/arm_cpu.hh b/src/cpu/kvm/arm_cpu.hh index 687cb48b1..786320cfd 100644 --- a/src/cpu/kvm/arm_cpu.hh +++ b/src/cpu/kvm/arm_cpu.hh @@ -94,6 +94,8 @@ class ArmKvmCPU : public BaseKvmCPU void updateKvmState(); void updateThreadContext(); + Tick onKvmExitHypercall(); + /** * Get a list of registers supported by getOneReg() and setOneReg(). */ |