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authorAndreas Sandberg <andreas@sandberg.pp.se>2013-09-25 12:24:26 +0200
committerAndreas Sandberg <andreas@sandberg.pp.se>2013-09-25 12:24:26 +0200
commit599b59b38754c764aced7edf553c2dea846d3cd8 (patch)
tree164e5d2216f789d00baea2efcceaf4bdc3041a4b /src/cpu/kvm/vm.cc
parentcd9cd85ce9b0f3905ecfcd843d128b0fd754871c (diff)
downloadgem5-599b59b38754c764aced7edf553c2dea846d3cd8.tar.xz
kvm: Initial x86 support
This changeset adds support for KVM on x86. Full support is split across a number of commits since some features are relatively complex. This changeset includes support for: * Integer state synchronization (including segment regs) * CPUID (gem5's CPUID values are inserted into KVM) * x86 legacy IO (remapped and handled by gem5's memory system) * Memory mapped IO * PCI * MSRs * State dumping Most of the functionality is fairly straight forward. There are some quirks to support PCI enumerations since this is done in the TLB(!) in the simulated CPUs. We currently replicate some of that code. Unlike the ARM implementation, the x86 implementation of the virtual CPU does not use the cycles hardware counter. KVM on x86 simulates the time stamp counter (TSC) in the kernel. If we just measure host cycles using perfevent, we might end up measuring a slightly different number of cycles. If we don't get the cycle accounting right, we might end up rewinding the TSC, with all kinds of chaos as a result. An additional feature of the KVM CPU on x86 is extended state dumping. This enables Python scripts controlling the simulator to request dumping of a subset of the processor state. The following methods are currenlty supported: * dumpFpuRegs * dumpIntRegs * dumpSpecRegs * dumpDebugRegs * dumpXCRs * dumpXSave * dumpVCpuEvents * dumpMSRs Known limitations: * M5 ops are currently not supported. * FPU synchronization is not supported (only affects CPU switching). Both of the limitations will be addressed in separate commits.
Diffstat (limited to 'src/cpu/kvm/vm.cc')
-rw-r--r--src/cpu/kvm/vm.cc96
1 files changed, 96 insertions, 0 deletions
diff --git a/src/cpu/kvm/vm.cc b/src/cpu/kvm/vm.cc
index 8e7f6462d..5ce42a5ac 100644
--- a/src/cpu/kvm/vm.cc
+++ b/src/cpu/kvm/vm.cc
@@ -45,6 +45,7 @@
#include <unistd.h>
#include <cerrno>
+#include <memory>
#include "cpu/kvm/vm.hh"
#include "debug/Kvm.hh"
@@ -140,6 +141,46 @@ Kvm::capIRQChip() const
}
bool
+Kvm::capVCPUEvents() const
+{
+#ifdef KVM_CAP_VCPU_EVENTS
+ return checkExtension(KVM_CAP_VCPU_EVENTS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capDebugRegs() const
+{
+#ifdef KVM_CAP_DEBUGREGS
+ return checkExtension(KVM_CAP_DEBUGREGS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capXCRs() const
+{
+#ifdef KVM_CAP_XCRS
+ return checkExtension(KVM_CAP_XCRS) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
+Kvm::capXSave() const
+{
+#ifdef KVM_CAP_XSAVE
+ return checkExtension(KVM_CAP_XSAVE) != 0;
+#else
+ return false;
+#endif
+}
+
+bool
Kvm::getSupportedCPUID(struct kvm_cpuid2 &cpuid) const
{
#if defined(__i386__) || defined(__x86_64__)
@@ -155,6 +196,61 @@ Kvm::getSupportedCPUID(struct kvm_cpuid2 &cpuid) const
#endif
}
+const Kvm::CPUIDVector &
+Kvm::getSupportedCPUID() const
+{
+ if (supportedCPUIDCache.empty()) {
+ std::unique_ptr<struct kvm_cpuid2> cpuid;
+ int i(1);
+ do {
+ cpuid.reset((struct kvm_cpuid2 *)operator new(
+ sizeof(kvm_cpuid2) + i * sizeof(kvm_cpuid_entry2)));
+
+ cpuid->nent = i;
+ ++i;
+ } while (!getSupportedCPUID(*cpuid));
+ supportedCPUIDCache.assign(cpuid->entries,
+ cpuid->entries + cpuid->nent);
+ }
+
+ return supportedCPUIDCache;
+}
+
+bool
+Kvm::getSupportedMSRs(struct kvm_msr_list &msrs) const
+{
+#if defined(__i386__) || defined(__x86_64__)
+ if (ioctl(KVM_GET_MSR_INDEX_LIST, (void *)&msrs) == -1) {
+ if (errno == E2BIG)
+ return false;
+ else
+ panic("KVM: Failed to get supported CPUID (errno: %i)\n", errno);
+ } else
+ return true;
+#else
+ panic("KVM: getSupportedCPUID is unsupported on this platform.\n");
+#endif
+}
+
+const Kvm::MSRIndexVector &
+Kvm::getSupportedMSRs() const
+{
+ if (supportedMSRCache.empty()) {
+ std::unique_ptr<struct kvm_msr_list> msrs;
+ int i(0);
+ do {
+ msrs.reset((struct kvm_msr_list *)operator new(
+ sizeof(kvm_msr_list) + i * sizeof(uint32_t)));
+
+ msrs->nmsrs = i;
+ ++i;
+ } while (!getSupportedMSRs(*msrs));
+ supportedMSRCache.assign(msrs->indices, msrs->indices + msrs->nmsrs);
+ }
+
+ return supportedMSRCache;
+}
+
int
Kvm::checkExtension(int extension) const
{