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author | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-09-25 12:24:26 +0200 |
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committer | Andreas Sandberg <andreas@sandberg.pp.se> | 2013-09-25 12:24:26 +0200 |
commit | 599b59b38754c764aced7edf553c2dea846d3cd8 (patch) | |
tree | 164e5d2216f789d00baea2efcceaf4bdc3041a4b /src/cpu/kvm/vm.hh | |
parent | cd9cd85ce9b0f3905ecfcd843d128b0fd754871c (diff) | |
download | gem5-599b59b38754c764aced7edf553c2dea846d3cd8.tar.xz |
kvm: Initial x86 support
This changeset adds support for KVM on x86. Full support is split
across a number of commits since some features are relatively
complex. This changeset includes support for:
* Integer state synchronization (including segment regs)
* CPUID (gem5's CPUID values are inserted into KVM)
* x86 legacy IO (remapped and handled by gem5's memory system)
* Memory mapped IO
* PCI
* MSRs
* State dumping
Most of the functionality is fairly straight forward. There are some
quirks to support PCI enumerations since this is done in the TLB(!) in
the simulated CPUs. We currently replicate some of that code.
Unlike the ARM implementation, the x86 implementation of the virtual
CPU does not use the cycles hardware counter. KVM on x86 simulates the
time stamp counter (TSC) in the kernel. If we just measure host cycles
using perfevent, we might end up measuring a slightly different number
of cycles. If we don't get the cycle accounting right, we might end up
rewinding the TSC, with all kinds of chaos as a result.
An additional feature of the KVM CPU on x86 is extended state
dumping. This enables Python scripts controlling the simulator to
request dumping of a subset of the processor state. The following
methods are currenlty supported:
* dumpFpuRegs
* dumpIntRegs
* dumpSpecRegs
* dumpDebugRegs
* dumpXCRs
* dumpXSave
* dumpVCpuEvents
* dumpMSRs
Known limitations:
* M5 ops are currently not supported.
* FPU synchronization is not supported (only affects CPU switching).
Both of the limitations will be addressed in separate commits.
Diffstat (limited to 'src/cpu/kvm/vm.hh')
-rw-r--r-- | src/cpu/kvm/vm.hh | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/cpu/kvm/vm.hh b/src/cpu/kvm/vm.hh index 67e8e4cbd..660805ed7 100644 --- a/src/cpu/kvm/vm.hh +++ b/src/cpu/kvm/vm.hh @@ -40,6 +40,8 @@ #ifndef __CPU_KVM_KVMVM_HH__ #define __CPU_KVM_KVMVM_HH__ +#include <vector> + #include "base/addr_range.hh" #include "sim/sim_object.hh" @@ -72,6 +74,9 @@ class Kvm friend class KvmVM; public: + typedef std::vector<struct kvm_cpuid_entry2> CPUIDVector; + typedef std::vector<uint32_t> MSRIndexVector; + virtual ~Kvm(); Kvm *create(); @@ -117,6 +122,18 @@ class Kvm * @see KvmVM::createIRQChip() */ bool capIRQChip() const; + + /** Support for getting and setting the kvm_vcpu_events structure. */ + bool capVCPUEvents() const; + + /** Support for getting and setting the kvm_debugregs structure. */ + bool capDebugRegs() const; + + /** Support for getting and setting the x86 XCRs. */ + bool capXCRs() const; + + /** Support for getting and setting the kvm_xsave structure. */ + bool capXSave() const; /** @} */ /** @@ -128,6 +145,35 @@ class Kvm */ bool getSupportedCPUID(struct kvm_cpuid2 &cpuid) const; + /** + * Get the CPUID features supported by the hardware and Kvm. + * + * @note Requires capExtendedCPUID(). + * + * @note This method uses an internal cache to minimize the number + * of calls into the kernel. + * + * @return Reference to cached MSR index list. + */ + const CPUIDVector &getSupportedCPUID() const; + + /** + * Get the MSRs supported by the hardware and Kvm. + * + * @return False if the allocation is too small, true on success. + */ + bool getSupportedMSRs(struct kvm_msr_list &msrs) const; + + /** + * Get the MSRs supported by the hardware and Kvm. + * + * @note This method uses an internal cache to minimize the number + * of calls into the kernel. + * + * @return Reference to cached MSR index list. + */ + const MSRIndexVector &getSupportedMSRs() const; + protected: /** * Check for the presence of an extension to the KVM API. @@ -186,6 +232,12 @@ class Kvm /** Size of the MMAPed vCPU parameter area. */ int vcpuMMapSize; + /** Cached vector of supported CPUID entries. */ + mutable CPUIDVector supportedCPUIDCache; + + /** Cached vector of supported MSRs. */ + mutable MSRIndexVector supportedMSRCache; + /** Singleton instance */ static Kvm *instance; }; |