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authorGabe Black <gabeblack@google.com>2018-11-19 17:20:31 -0800
committerGabe Black <gabeblack@google.com>2018-12-20 19:27:51 +0000
commit88bbabe93f339f9db301caf43bf2cca2a0e8048c (patch)
tree66323afaa9348f392deafe11d88973fd3034001b /src/cpu/kvm/x86_cpu.cc
parent67d58e81825d7dff17def2cfeedf5d958141be55 (diff)
downloadgem5-88bbabe93f339f9db301caf43bf2cca2a0e8048c.tar.xz
arch, cpu: Remove float type accessors.
Use the binary accessors instead. Change-Id: Iff1877e92c79df02b3d13635391a8c2f025776a2 Reviewed-on: https://gem5-review.googlesource.com/c/14457 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/cpu/kvm/x86_cpu.cc')
-rw-r--r--src/cpu/kvm/x86_cpu.cc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc
index 012cccd20..c7625bcc6 100644
--- a/src/cpu/kvm/x86_cpu.cc
+++ b/src/cpu/kvm/x86_cpu.cc
@@ -840,7 +840,8 @@ updateKvmStateFPUCommon(ThreadContext *tc, T &fpu)
const unsigned top((fpu.fsw >> 11) & 0x7);
for (int i = 0; i < 8; ++i) {
const unsigned reg_idx((i + top) & 0x7);
- const double value(tc->readFloatReg(FLOATREG_FPR(reg_idx)));
+ const double value(bitsToFloat64(
+ tc->readFloatRegBits(FLOATREG_FPR(reg_idx))));
DPRINTF(KvmContext, "Setting KVM FP reg %i (st[%i]) := %f\n",
reg_idx, i, value);
X86ISA::storeFloat80(fpu.fpr[i], value);
@@ -1055,7 +1056,7 @@ updateThreadContextFPUCommon(ThreadContext *tc, const T &fpu)
const double value(X86ISA::loadFloat80(fpu.fpr[i]));
DPRINTF(KvmContext, "Setting gem5 FP reg %i (st[%i]) := %f\n",
reg_idx, i, value);
- tc->setFloatReg(FLOATREG_FPR(reg_idx), value);
+ tc->setFloatRegBits(FLOATREG_FPR(reg_idx), floatToBits64(value));
}
// TODO: We should update the MMX state