kvm: FPU synchronization support on x86

This changeset adds support for synchronizing the FPU and SIMD state
of a virtual x86 CPU with gem5. It supports both the XSave API and the
KVM_(GET|SET)_FPU kernel API. The XSave interface can be disabled
using the useXSave parameter (in case of kernel
issues). Unfortunately, KVM_(GET|SET)_FPU interface seems to be buggy
in some kernels (specifically, the MXCSR register isn't always
synchronized), which means that it might not be possible to
synchronize MXCSR on old kernels without the XSave interface.

This changeset depends on the __float80 type in gcc and might not
build using llvm.

1 files changed, 34 insertions, 2 deletions

diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh
index 602fc8416..7dacdb03f 100644
--- a/src/cpu/kvm/x86_cpu.hh
+++ b/src/cpu/kvm/x86_cpu.hh
@@ -171,8 +171,33 @@ class X86KvmCPU : public BaseKvmCPU
     void updateKvmStateRegs();
     /** Update control registers (CRx, segments, etc.) */
     void updateKvmStateSRegs();
-    /** Update FPU and SIMD registers */
+    /**
+     * Update FPU and SIMD registers
+     *
+     * This method uses the appropriate (depending on availability and
+     * user configuration) kernel API by calling
+     * updateKvmStateFPULegacy() or updateKvmStateFPUXSave().
+     *
+     * @see updateKvmStateFPULegacy()
+     * @see updateKvmStateFPUXSave()
+     */
     void updateKvmStateFPU();
+    /**
+     * Update FPU and SIMD registers using the legacy API
+     *
+     * @note This method should normally only be called by
+     * updateKvmStateFPU() which automatically chooses between
+     * available APIs.
+     */
+    void updateKvmStateFPULegacy();
+    /**
+     * Update FPU and SIMD registers using the XSave API
+     *
+     * @note This method should normally only be called by
+     * updateKvmStateFPU() which automatically chooses between
+     * available APIs.
+     */
+    void updateKvmStateFPUXSave();
     /** Update MSR registers */
     void updateKvmStateMSRs();
     /** @} */
@@ -187,8 +212,10 @@ class X86KvmCPU : public BaseKvmCPU
     void updateThreadContextRegs();
     /** Update control registers (CRx, segments, etc.) */
     void updateThreadContextSRegs();
-    /** Update FPU and SIMD registers */
+    /** Update FPU and SIMD registers using the legacy API */
     void updateThreadContextFPU();
+    /** Update FPU and SIMD registers using the XSave API */
+    void updateThreadContextXSave();
     /** Update MSR registers */
     void updateThreadContextMSRs();
     /** @} */
@@ -217,6 +244,11 @@ class X86KvmCPU : public BaseKvmCPU
     bool haveDebugRegs;
     /** Kvm::capXSave() available? */
     bool haveXSave;
+    /**
+     * Should the XSave interface be used to sync the FPU and SIMD
+     * registers?
+     */
+    bool useXSave;
     /** Kvm::capXCRs() available? */
     bool haveXCRs;
     /** @} */