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authorMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
commit9e07a7504c94973e7837d1d3e96dbdb8d95cfad3 (patch)
tree7f845430119da24bcb4405df3a1c2102f6b7b534 /src/cpu/kvm
parenta5c4eb3de9deb3a71a6a5230a25ff5962e584980 (diff)
downloadgem5-9e07a7504c94973e7837d1d3e96dbdb8d95cfad3.tar.xz
cpu,isa,mem: Add per-thread wakeup logic
Changes wakeup functionality so that only specific threads on SMT capable cpus are woken.
Diffstat (limited to 'src/cpu/kvm')
-rw-r--r--src/cpu/kvm/base.cc2
-rw-r--r--src/cpu/kvm/base.hh2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 47cff5917..32f94eca8 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -408,7 +408,7 @@ BaseKvmCPU::verifyMemoryMode() const
}
void
-BaseKvmCPU::wakeup()
+BaseKvmCPU::wakeup(ThreadID tid)
{
DPRINTF(Kvm, "wakeup()\n");
// This method might have been called from another
diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh
index df6a67808..89c52cf6b 100644
--- a/src/cpu/kvm/base.hh
+++ b/src/cpu/kvm/base.hh
@@ -100,7 +100,7 @@ class BaseKvmCPU : public BaseCPU
MasterPort &getDataPort() { return dataPort; }
MasterPort &getInstPort() { return instPort; }
- void wakeup();
+ void wakeup(ThreadID tid = 0) M5_ATTR_OVERRIDE;
void activateContext(ThreadID thread_num);
void suspendContext(ThreadID thread_num);
void deallocateContext(ThreadID thread_num);