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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
| commit | be28d96510e0e722db83b26f1a12d3f5de979b32 (patch) | |
| tree | 6a7e1807397f002f51fddb34568b89250fca45c8 /src/cpu/kvm | |
| parent | 8615b27174ae06db4665016c877b1e88031af203 (diff) | |
| download | gem5-be28d96510e0e722db83b26f1a12d3f5de979b32.tar.xz | |
Revert power patch sets with unexpected interactions
The following patches had unexpected interactions with the current
upstream code and have been reverted for now:
e07fd01651f3: power: Add support for power models
831c7f2f9e39: power: Low-power idle power state for idle CPUs
4f749e00b667: power: Add power states to ClockedObject
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
--HG--
extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508
Diffstat (limited to 'src/cpu/kvm')
| -rw-r--r-- | src/cpu/kvm/base.cc | 2 | ||||
| -rw-r--r-- | src/cpu/kvm/x86_cpu.cc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 0670f61c6..bf4d68603 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -1027,7 +1027,7 @@ BaseKvmCPU::doMMIOAccess(Addr paddr, void *data, int size, bool write) syncThreadContext(); Request mmio_req(paddr, size, Request::UNCACHEABLE, dataMasterId()); - mmio_req.setContext(tc->contextId()); + mmio_req.setThreadContext(tc->contextId(), 0); // Some architectures do need to massage physical addresses a bit // before they are inserted into the memory system. This enables // APIC accesses on x86 and m5ops where supported through a MMIO diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc index 9e9115ef5..c6c874dc4 100644 --- a/src/cpu/kvm/x86_cpu.cc +++ b/src/cpu/kvm/x86_cpu.cc @@ -1346,7 +1346,7 @@ X86KvmCPU::handleKvmExitIO() Request io_req(pAddr, kvm_run.io.size, Request::UNCACHEABLE, dataMasterId()); - io_req.setContext(tc->contextId()); + io_req.setThreadContext(tc->contextId(), 0); const MemCmd cmd(isWrite ? MemCmd::WriteReq : MemCmd::ReadReq); // Temporarily lock and migrate to the event queue of the |