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authorCurtis Dunham <Curtis.Dunham@arm.com>2014-10-21 17:04:41 -0500
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-10-21 17:04:41 -0500
commit4024fab7fc16223018a48af4a19efeec865c889b (patch)
tree8a2285b72370de07b44e7b452f30ace2c19a32b2 /src/cpu/kvm
parent46f9f11a5575a0ec8a69a1c0181b37668de65152 (diff)
downloadgem5-4024fab7fc16223018a48af4a19efeec865c889b.tar.xz
mem: don't inhibit WriteInv's or defer snoops on their MSHRs
WriteInvalidate semantics depend on the unconditional writeback or they won't complete. Also, there's no point in deferring snoops on their MSHRs, as they don't get new data at the end of their life cycle the way other transactions do. Add comment in the cache about a minor inefficiency re: WriteInvalidate.
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