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authorMitch Hayenga <mitch.hayenga@arm.com>2014-10-29 23:18:27 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2014-10-29 23:18:27 -0500
commit5bfa521c46e489c06ac3ae44b97421f5ccb30bb7 (patch)
treec481d242810201e5c9bfb138b4e096ad4174dda4 /src/cpu/m5legion_interface.h
parent6847bbf7cefcebfeed6ec29fa139efcb3ce20be4 (diff)
downloadgem5-5bfa521c46e489c06ac3ae44b97421f5ccb30bb7.tar.xz
cpu: Add writeback modeling for drain functionality
It is possible for the O3 CPU to consider itself drained and later have a squashed instruction perform a writeback. This patch re-adds tracking of in-flight instructions to prevent falsely signaling a drained event.
Diffstat (limited to 'src/cpu/m5legion_interface.h')
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