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authorRon Dreslinski <rdreslin@umich.edu>2006-10-11 18:28:33 -0400
committerRon Dreslinski <rdreslin@umich.edu>2006-10-11 18:28:33 -0400
commit567afbf6ce5b2d6fe573878c39679e56a1bf5d15 (patch)
treeae5caee54ed390314e88a6eaa1dcb988cad96556 /src/cpu/memtest/memtest.hh
parent03c42ea5904ea5f9f5e8d634f6bc61992abef746 (diff)
downloadgem5-567afbf6ce5b2d6fe573878c39679e56a1bf5d15.tar.xz
More cache fixes. Atomic coherence now works as well.
src/cpu/memtest/memtest.cc: src/cpu/memtest/memtest.hh: Make Memtester able to test atomic as well src/mem/bus.cc: src/mem/bus.hh: Handle atomic snoops properly for cache->cache transfers src/mem/cache/cache_impl.hh: Debug output. Clean up memleak in atomic mode. Set hitLatency. Still need to send back reasonable number for atomic return value. src/mem/packet.cc: Add command strings for new commands src/python/m5/objects/MemTest.py: Add param to test atomic memory. --HG-- extra : convert_revision : 43f880e29215776167c16ea90793ebf8122c785b
Diffstat (limited to 'src/cpu/memtest/memtest.hh')
-rw-r--r--src/cpu/memtest/memtest.hh8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh
index 87ecc6de3..5de41f0d8 100644
--- a/src/cpu/memtest/memtest.hh
+++ b/src/cpu/memtest/memtest.hh
@@ -61,7 +61,8 @@ class MemTest : public MemObject
unsigned _percentSourceUnaligned,
unsigned _percentDestUnaligned,
Addr _traceAddr,
- Counter _max_loads);
+ Counter _max_loads,
+ bool _atomic);
virtual void init();
@@ -175,6 +176,9 @@ class MemTest : public MemObject
uint64_t numReads;
uint64_t maxLoads;
+
+ bool atomic;
+
Stats::Scalar<> numReadsStat;
Stats::Scalar<> numWritesStat;
Stats::Scalar<> numCopiesStat;
@@ -182,6 +186,8 @@ class MemTest : public MemObject
// called by MemCompleteEvent::process()
void completeRequest(Packet *pkt);
+ void sendPkt(Packet *pkt);
+
void doRetry();
friend class MemCompleteEvent;