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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
| commit | a962fc4f561126bea65f3dd52a7194c5527d255a (patch) | |
| tree | 0371556ab67772ca4023acd65618df67d123bb5d /src/cpu/memtest/memtest.hh | |
| parent | 023fccff0e7f6e2be144c56567b58845cc7383f5 (diff) | |
| download | gem5-a962fc4f561126bea65f3dd52a7194c5527d255a.tar.xz | |
Make CPU models signal to update the snoop ranges
--HG--
extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
Diffstat (limited to 'src/cpu/memtest/memtest.hh')
| -rw-r--r-- | src/cpu/memtest/memtest.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh index 2694efd39..7bf34d827 100644 --- a/src/cpu/memtest/memtest.hh +++ b/src/cpu/memtest/memtest.hh @@ -100,6 +100,8 @@ class MemTest : public MemObject : Port(_name, _memtest), memtest(_memtest) { } + bool snoopRangeSent; + protected: virtual bool recvTiming(PacketPtr pkt); @@ -120,6 +122,8 @@ class MemTest : public MemObject CpuPort cachePort; CpuPort funcPort; + bool snoopRangeSent; + class MemTestSenderState : public Packet::SenderState { public: |