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| author | Ali Saidi <saidi@eecs.umich.edu> | 2008-09-10 14:26:15 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-09-10 14:26:15 -0400 |
| commit | 3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0 (patch) | |
| tree | c9e147a14bcab9e4767ad13a00ac4a375044c441 /src/cpu/memtest | |
| parent | 09a8fb0b5263d4b41b8206ce075a3f6923907d65 (diff) | |
| download | gem5-3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0.tar.xz | |
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
Diffstat (limited to 'src/cpu/memtest')
| -rw-r--r-- | src/cpu/memtest/memtest.hh | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh index 43f141af6..5a7e0b9ae 100644 --- a/src/cpu/memtest/memtest.hh +++ b/src/cpu/memtest/memtest.hh @@ -133,10 +133,10 @@ class MemTest : public MemObject bool accessRetry; - unsigned size; // size of testing memory region + unsigned size; // size of testing memory region - unsigned percentReads; // target percentage of read accesses - unsigned percentFunctional; // target percentage of functional accesses + unsigned percentReads; // target percentage of read accesses + unsigned percentFunctional; // target percentage of functional accesses unsigned percentUncacheable; int id; @@ -154,12 +154,12 @@ class MemTest : public MemObject Addr traceBlockAddr; - Addr baseAddr1; // fix this to option - Addr baseAddr2; // fix this to option + Addr baseAddr1; // fix this to option + Addr baseAddr2; // fix this to option Addr uncacheAddr; - unsigned progressInterval; // frequency of progress reports - Tick nextProgressMessage; // access # for next progress report + unsigned progressInterval; // frequency of progress reports + Tick nextProgressMessage; // access # for next progress report unsigned percentSourceUnaligned; unsigned percentDestUnaligned; |