Merge ARM into the head. ARM will compile but may not actually work.

2 files changed, 22 insertions, 22 deletions

diff --git a/src/cpu/memtest/memtest.cc b/src/cpu/memtest/memtest.cc
index 42889163a..3c57f85b7 100644
--- a/src/cpu/memtest/memtest.cc
+++ b/src/cpu/memtest/memtest.cc
@@ -152,7 +152,7 @@ MemTest::MemTest(const Params *p)
     // set up counters
     noResponseCycles = 0;
     numReads = 0;
-    tickEvent.schedule(0);
+    schedule(tickEvent, 0);
 
     id = TESTER_ALLOCATOR++;
 
@@ -262,7 +262,7 @@ void
 MemTest::tick()
 {
     if (!tickEvent.scheduled())
-        tickEvent.schedule(curTick + ticks(1));
+        schedule(tickEvent, curTick + ticks(1));
 
     if (++noResponseCycles >= 500000) {
         cerr << name() << ": deadlocked at cycle " << curTick << endl;
@@ -279,7 +279,7 @@ MemTest::tick()
     unsigned base = random() % 2;
     uint64_t data = random();
     unsigned access_size = random() % 4;
-    unsigned cacheable = random() % 100;
+    bool uncacheable = (random() % 100) < percentUncacheable;
 
     //If we aren't doing copies, use id as offset, and do a false sharing
     //mem tester
@@ -290,17 +290,16 @@ MemTest::tick()
     access_size = 0;
 
     Request *req = new Request();
-    uint32_t flags = 0;
+    Request::Flags flags;
     Addr paddr;
 
-    if (cacheable < percentUncacheable) {
-        flags |= UNCACHEABLE;
+    if (uncacheable) {
+        flags.set(Request::UNCACHEABLE);
         paddr = uncacheAddr + offset;
     } else {
         paddr = ((base) ? baseAddr1 : baseAddr2) + offset;
     }
-    bool probe = (random() % 100 < percentFunctional) && !(flags & UNCACHEABLE);
-    //bool probe = false;
+    bool probe = (random() % 100 < percentFunctional) && !uncacheable;
 
     paddr &= ~((1 << access_size) - 1);
     req->setPhys(paddr, 1 << access_size, flags);
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh
index ac2d0a058..907659f69 100644
--- a/src/cpu/memtest/memtest.hh
+++ b/src/cpu/memtest/memtest.hh
@@ -35,6 +35,7 @@
 #include <set>
 
 #include "base/statistics.hh"
+#include "base/fast_alloc.hh"
 #include "params/MemTest.hh"
 #include "sim/eventq.hh"
 #include "sim/sim_exit.hh"
@@ -73,10 +74,10 @@ class MemTest : public MemObject
     {
       private:
         MemTest *cpu;
+
       public:
-        TickEvent(MemTest *c)
-            : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
-        void process() {cpu->tick();}
+        TickEvent(MemTest *c) : Event(CPU_Tick_Pri), cpu(c) {}
+        void process() { cpu->tick(); }
         virtual const char *description() const { return "MemTest tick"; }
     };
 
@@ -116,7 +117,7 @@ class MemTest : public MemObject
 
     bool snoopRangeSent;
 
-    class MemTestSenderState : public Packet::SenderState
+    class MemTestSenderState : public Packet::SenderState, public FastAlloc
     {
       public:
         /** Constructor. */
@@ -132,10 +133,10 @@ class MemTest : public MemObject
 
     bool accessRetry;
 
-    unsigned size;		// size of testing memory region
+    unsigned size;              // size of testing memory region
 
-    unsigned percentReads;	// target percentage of read accesses
-    unsigned percentFunctional;	// target percentage of functional accesses
+    unsigned percentReads;      // target percentage of read accesses
+    unsigned percentFunctional; // target percentage of functional accesses
     unsigned percentUncacheable;
 
     int id;
@@ -153,12 +154,12 @@ class MemTest : public MemObject
 
     Addr traceBlockAddr;
 
-    Addr baseAddr1;		// fix this to option
-    Addr baseAddr2;		// fix this to option
+    Addr baseAddr1;             // fix this to option
+    Addr baseAddr2;             // fix this to option
     Addr uncacheAddr;
 
-    unsigned progressInterval;	// frequency of progress reports
-    Tick nextProgressMessage;	// access # for next progress report
+    unsigned progressInterval;  // frequency of progress reports
+    Tick nextProgressMessage;   // access # for next progress report
 
     unsigned percentSourceUnaligned;
     unsigned percentDestUnaligned;
@@ -170,9 +171,9 @@ class MemTest : public MemObject
 
     bool atomic;
 
-    Stats::Scalar<> numReadsStat;
-    Stats::Scalar<> numWritesStat;
-    Stats::Scalar<> numCopiesStat;
+    Stats::Scalar numReadsStat;
+    Stats::Scalar numWritesStat;
+    Stats::Scalar numCopiesStat;
 
     // called by MemCompleteEvent::process()
     void completeRequest(PacketPtr pkt);