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author | Wendy Elsasser <wendy.elsasser@arm.com> | 2017-04-06 21:40:16 -0500 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-05-18 09:26:45 +0000 |
commit | 76aebd9b607351e5601bf52c9ac42ede6496ee64 (patch) | |
tree | 399b2e46673b21a33e40680112537c72f013f2f0 /src/cpu/minor/cpu.hh | |
parent | 5f3ed10a03100046b52238e3707df26f1cc1e1dd (diff) | |
download | gem5-76aebd9b607351e5601bf52c9ac42ede6496ee64.tar.xz |
mem: Optimize self-refresh entry
Self-refresh is entered during a refresh event, when the
rank was previously in a precharge power-down state.
The original code would enter self-refresh after a refresh
was issued. The device subsequently will issue a refresh
on self-refresh entry. On self-refresh exit, the controller
will issue another refresh command.
Devices require at least one additional refresh to be issued
between self-refresh exit and re-entry. This ensures that enough
refreshes occur in the case when the device narrowly missed a
refresh on self-refresh exit.
To minimize the number of refresh operations and still maintain
the device requirement, the current logic does the following:
1) The controller will still enter self-refresh from a refresh
event, when the previous state was precharge power-down.
However, the refresh itself will be bypassed and the controller
will immediately issue a self-refresh entry.
2) On a self-refresh exit, the controller will immediately
issue a refresh command (per the original logic). This ensures
the devices requirements are met and is a convenient way to
kick off the command state machine.
Change-Id: I1c4b0dcbfa3bdafd755f3ccd65e267fcd700c491
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10102
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu/minor/cpu.hh')
0 files changed, 0 insertions, 0 deletions