diff options
| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-05 12:39:21 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2016-04-05 12:39:21 -0500 |
| commit | 8615b27174ae06db4665016c877b1e88031af203 (patch) | |
| tree | 7b28888f71e7e41e84d4087b6ccb53670e04582b /src/cpu/minor/fetch1.cc | |
| parent | 76ee011a12ade238d5cbf4b570e1d34d7ba72687 (diff) | |
| download | gem5-8615b27174ae06db4665016c877b1e88031af203.tar.xz | |
mem: Remove threadId from memory request class
In general, the ThreadID parameter is unnecessary in the memory system
as the ContextID is what is used for the purposes of locks/wakeups.
Since we allocate sequential ContextIDs for each thread on MT-enabled
CPUs, ThreadID is unnecessary as the CPUs can identify the requesting
thread through sideband info (SenderState / LSQ entries) or ContextID
offset from the base ContextID for a cpu.
Diffstat (limited to 'src/cpu/minor/fetch1.cc')
| -rw-r--r-- | src/cpu/minor/fetch1.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/minor/fetch1.cc b/src/cpu/minor/fetch1.cc index 84aaf02f5..d19d7b042 100644 --- a/src/cpu/minor/fetch1.cc +++ b/src/cpu/minor/fetch1.cc @@ -135,8 +135,7 @@ Fetch1::fetchLine() "%s addr: 0x%x pc: %s line_offset: %d request_size: %d\n", request_id, aligned_pc, pc, line_offset, request_size); - request->request.setThreadContext(cpu.threads[0]->getTC()->contextId(), - /* thread id */ 0); + request->request.setContext(cpu.threads[0]->getTC()->contextId()); request->request.setVirt(0 /* asid */, aligned_pc, request_size, Request::INST_FETCH, cpu.instMasterId(), /* I've no idea why we need the PC, but give it */ |